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Line 61... | Line 61... | ||
61 | #include <panic.h> |
61 | #include <panic.h> |
62 | #include <print.h> |
62 | #include <print.h> |
63 | #include <sysinfo/sysinfo.h> |
63 | #include <sysinfo/sysinfo.h> |
64 | 64 | ||
65 | /*NS16550 as a COM 1*/ |
65 | /*NS16550 as a COM 1*/ |
66 | #define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE) |
66 | #define NS16550_IRQ (4+LEGACY_INTERRUPT_BASE) |
67 | #define NS16550_PORT 0x3f8 |
67 | #define NS16550_PORT 0x3f8 |
68 | 68 | ||
69 | bootinfo_t *bootinfo; |
69 | bootinfo_t *bootinfo; |
70 | 70 | ||
71 | static uint64_t iosapic_base=0xfec00000; |
71 | static uint64_t iosapic_base=0xfec00000; |
Line 107... | Line 107... | ||
107 | { |
107 | { |
108 | 108 | ||
109 | if(i==2) continue; //Disable Cascade interrupt |
109 | if(i==2) continue; //Disable Cascade interrupt |
110 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i; |
110 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i; |
111 | srlz_d(); |
111 | srlz_d(); |
112 | ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i; |
112 | ((uint32_t*)(IOSAPIC+0x10))[0]=LEGACY_INTERRUPT_BASE+i; |
113 | srlz_d(); |
113 | srlz_d(); |
114 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1; |
114 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1; |
115 | srlz_d(); |
115 | srlz_d(); |
116 | ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32); |
116 | ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32); |
117 | srlz_d(); |
117 | srlz_d(); |