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34 | #define PSR_I_MASK 0x4000 |
34 | #define PSR_I_MASK 0x4000 |
35 | #define PSR_PK_MASK 0x8000 |
35 | #define PSR_PK_MASK 0x8000 |
36 | 36 | ||
37 | #define PSR_DT_MASK (1<<17) |
37 | #define PSR_DT_MASK (1<<17) |
38 | #define PSR_RT_MASK (1<<27) |
38 | #define PSR_RT_MASK (1<<27) |
- | 39 | ||
- | 40 | #define PSR_DFL_MASK (1<<18) |
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- | 41 | #define PSR_DFH_MASK (1<<19) |
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- | 42 | ||
39 | #define PSR_IT_MASK 0x0000001000000000 |
43 | #define PSR_IT_MASK 0x0000001000000000 |
40 | 44 | ||
41 | #define PSR_CPL_SHIFT 32 |
45 | #define PSR_CPL_SHIFT 32 |
42 | #define PSR_CPL_MASK_SHIFTED 3 |
46 | #define PSR_CPL_MASK_SHIFTED 3 |
43 | 47 |