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27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __ia64_CPU_H__ |
29 | #ifndef __ia64_CPU_H__ |
30 | #define __ia64_CPU_H__ |
30 | #define __ia64_CPU_H__ |
31 | 31 | ||
- | 32 | #include <arch/types.h> |
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32 | #include <typedefs.h> |
33 | #include <typedefs.h> |
- | 34 | #include <arch/register.h> |
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- | 35 | ||
- | 36 | #define FAMILY_ITANIUM 0x7 |
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- | 37 | #define FAMILY_ITANIUM2 0x1f |
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33 | 38 | ||
34 | struct cpu_arch { |
39 | struct cpu_arch { |
- | 40 | __u64 cpuid0; |
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- | 41 | __u64 cpuid1; |
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- | 42 | cpuid3_t cpuid3; |
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35 | }; |
43 | }; |
- | 44 | ||
- | 45 | /** Read CPUID register. |
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- | 46 | * |
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- | 47 | * @param n CPUID register number. |
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- | 48 | * |
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- | 49 | * @return Value of CPUID[n] register. |
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- | 50 | */ |
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- | 51 | static inline __u64 cpuid_read(int n) |
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- | 52 | { |
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- | 53 | __u64 v; |
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36 | 54 | ||
- | 55 | __asm__ volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
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- | 56 | ||
- | 57 | return v; |
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- | 58 | } |
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- | 59 | ||
37 | #endif |
60 | #endif |