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    __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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    __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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    return v;
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    return v;
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}
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}
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/** Read IVA (Interruption Vector Address).
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 *
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 * @return Return location of interruption vector table.
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 */
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static inline __u64 iva_read(void)
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{
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    __u64 v;
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    __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v));
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    return v;
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}
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/** Write IVA (Interruption Vector Address) register.
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 *
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 * @param New location of interruption vector table.
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 */
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static inline void iva_write(__u64 v)
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{
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    __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v));
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}
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/** Read IVR (External Interrupt Vector Register).
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/** Read IVR (External Interrupt Vector Register).
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 *
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 *
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 * @return Highest priority, pending, unmasked external interrupt vector.
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 * @return Highest priority, pending, unmasked external interrupt vector.
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 */
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 */
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static inline __u64 ivr_read(void)
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static inline __u64 ivr_read(void)
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    __asm__ volatile ("mov %0 = psr\n" : "=r" (v));
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    __asm__ volatile ("mov %0 = psr\n" : "=r" (v));
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    return (ipl_t) v;
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    return (ipl_t) v;
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}
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}
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#define set_shadow_register(reg,val) {__u64 v = val; __asm__  volatile("mov r15 = %0;;\n""bsw.0;;\n""mov "   #reg   " = r15;;\n""bsw.1;;\n" : : "r" (v) : "r15" ); }
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#define get_shadow_register(reg,val) {__u64 v ; __asm__  volatile("bsw.0;;\n" "mov r15 = r" #reg ";;\n" "bsw.1;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }
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#define get_control_register(reg,val) {__u64 v ; __asm__  volatile("mov r15 = cr" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }
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#define get_aplication_register(reg,val) {__u64 v ; __asm__  volatile("mov r15 = ar" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }
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#define get_psr(val) {__u64 v ; __asm__  volatile("mov r15 = psr;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; }
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extern void cpu_halt(void);
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extern void cpu_halt(void);
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extern void cpu_sleep(void);
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extern void cpu_sleep(void);
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extern void asm_delay_loop(__u32 t);
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extern void asm_delay_loop(__u32 t);
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#endif
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#endif