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Rev 1888 Rev 1970
Line 42... Line 42...
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#include <interrupt.h>
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#include <interrupt.h>
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#include <arch/interrupt.h>
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#include <arch/interrupt.h>
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#include <print.h>
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#include <print.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <arch.h>
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#include <arch.h>
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#include <ddi/irq.h>
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#include <ddi/device.h>
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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/*
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/*
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 * Advanced Programmable Interrupt Controller for SMP systems.
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 * Advanced Programmable Interrupt Controller for SMP systems.
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 */
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 */
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volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
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volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;
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volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
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volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;
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uint32_t apic_id_mask = 0;
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uint32_t apic_id_mask = 0;
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static irq_t l_apic_timer_irq;
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static int apic_poll_errors(void);
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static int apic_poll_errors(void);
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#ifdef LAPIC_VERBOSE
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#ifdef LAPIC_VERBOSE
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static char *delmod_str[] = {
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static char *delmod_str[] = {
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    "Polarity High",
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    "Polarity High",
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    "Polarity Low"
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    "Polarity Low"
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};
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};
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#endif /* LAPIC_VERBOSE */
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#endif /* LAPIC_VERBOSE */
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-
 
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/** APIC spurious interrupt handler.
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 *
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 * @param n Interrupt vector.
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 * @param istate Interrupted state.
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 */
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static void apic_spurious(int n, istate_t *istate)
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{
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#ifdef CONFIG_DEBUG
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    printf("cpu%d: APIC spurious interrupt\n", CPU->id);
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#endif
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}
120
 
134
 
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static void apic_spurious(int n, istate_t *istate);
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static irq_ownership_t l_apic_timer_claim(void)
-
 
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{
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    return IRQ_ACCEPT;
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}
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122
static void l_apic_timer_interrupt(int n, istate_t *istate);
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static void l_apic_timer_irq_handler(irq_t *irq, void *arg, ...)
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{
-
 
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    clock();
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}
123
 
144
 
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/** Initialize APIC on BSP. */
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/** Initialize APIC on BSP. */
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void apic_init(void)
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void apic_init(void)
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{
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{
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    io_apic_id_t idreg;
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    io_apic_id_t idreg;
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     * Configure interrupt routing.
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     * Configure interrupt routing.
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     * IRQ 0 remains masked as the time signal is generated by l_apic's themselves.
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     * IRQ 0 remains masked as the time signal is generated by l_apic's themselves.
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     * Other interrupts will be forwarded to the lowest priority CPU.
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     * Other interrupts will be forwarded to the lowest priority CPU.
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     */
161
     */
141
    io_apic_disable_irqs(0xffff);
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    io_apic_disable_irqs(0xffff);
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    irq_initialize(&l_apic_timer_irq);
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    l_apic_timer_irq.devno = device_assign_devno();
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    l_apic_timer_irq.inr = IRQ_CLK;
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    l_apic_timer_irq.claim = l_apic_timer_claim;
142
    exc_register(VECTOR_CLK, "l_apic_timer", (iroutine) l_apic_timer_interrupt);
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    l_apic_timer_irq.handler = l_apic_timer_irq_handler;
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    irq_register(&l_apic_timer_irq);
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143
    for (i = 0; i < IRQ_COUNT; i++) {
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    for (i = 0; i < IRQ_COUNT; i++) {
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        int pin;
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        int pin;
145
   
173
   
146
        if ((pin = smp_irq_to_pin(i)) != -1) {
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        if ((pin = smp_irq_to_pin(i)) != -1)
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            io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE+i, LOPRI);
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            io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE+i, LOPRI);
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        }
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    }
176
    }
150
   
177
   
151
    /*
178
    /*
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     * Ensure that io_apic has unique ID.
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     * Ensure that io_apic has unique ID.
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     */
180
     */
154
    idreg.value = io_apic_read(IOAPICID);
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    idreg.value = io_apic_read(IOAPICID);
155
    if ((1<<idreg.apic_id) & apic_id_mask) {    /* see if IO APIC ID is used already */
182
    if ((1 << idreg.apic_id) & apic_id_mask) {  /* see if IO APIC ID is used already */
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        for (i = 0; i < APIC_ID_COUNT; i++) {
183
        for (i = 0; i < APIC_ID_COUNT; i++) {
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            if (!((1<<i) & apic_id_mask)) {
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            if (!((1 << i) & apic_id_mask)) {
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                idreg.apic_id = i;
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                idreg.apic_id = i;
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                io_apic_write(IOAPICID, idreg.value);
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                io_apic_write(IOAPICID, idreg.value);
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                break;
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                break;
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            }
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            }
162
        }
189
        }
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168
    l_apic_init();
195
    l_apic_init();
169
 
196
 
170
    l_apic_debug();
197
    l_apic_debug();
171
}
198
}
172
 
199
 
173
/** APIC spurious interrupt handler.
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174
 *
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175
 * @param n Interrupt vector.
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176
 * @param istate Interrupted state.
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177
 */
-
 
178
void apic_spurious(int n, istate_t *istate)
-
 
179
{
-
 
180
#ifdef CONFIG_DEBUG
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181
    printf("cpu%d: APIC spurious interrupt\n", CPU->id);
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182
#endif
-
 
183
}
-
 
184
 
-
 
185
/** Poll for APIC errors.
200
/** Poll for APIC errors.
186
 *
201
 *
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 * Examine Error Status Register and report all errors found.
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 * Examine Error Status Register and report all errors found.
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 *
203
 *
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 * @return 0 on error, 1 on success.
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 * @return 0 on error, 1 on success.
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    error.value = l_apic[LVT_Err];
453
    error.value = l_apic[LVT_Err];
439
    printf("LVT Err: vector=%hhd, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]);
454
    printf("LVT Err: vector=%hhd, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]);
440
#endif
455
#endif
441
}
456
}
442
 
457
 
443
/** Local APIC Timer Interrupt.
-
 
444
 *
-
 
445
 * @param n Interrupt vector number.
-
 
446
 * @param istate Interrupted state.
-
 
447
 */
-
 
448
void l_apic_timer_interrupt(int n, istate_t *istate)
-
 
449
{
-
 
450
    l_apic_eoi();
-
 
451
    clock();
-
 
452
}
-
 
453
 
-
 
454
/** Get Local APIC ID.
458
/** Get Local APIC ID.
455
 *
459
 *
456
 * @return Local APIC ID.
460
 * @return Local APIC ID.
457
 */
461
 */
458
uint8_t l_apic_id(void)
462
uint8_t l_apic_id(void)