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Rev 15 | Rev 125 | ||
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Line 42... | Line 42... | ||
42 | /* ICW1: this is ICW1, ICW4 to follow */ |
42 | /* ICW1: this is ICW1, ICW4 to follow */ |
43 | outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4); |
43 | outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4); |
44 | 44 | ||
45 | /* ICW2: IRQ 0 maps to INT IRQBASE */ |
45 | /* ICW2: IRQ 0 maps to INT IRQBASE */ |
46 | outb(PIC_PIC0PORT2, IVT_IRQBASE); |
46 | outb(PIC_PIC0PORT2, IVT_IRQBASE); |
47 | 47 | ||
48 | /* ICW3: pic1 using IRQ IRQ_PIC1 */ |
48 | /* ICW3: pic1 using IRQ IRQ_PIC1 */ |
49 | outb(PIC_PIC0PORT2, 1 << IRQ_PIC1); |
49 | outb(PIC_PIC0PORT2, 1 << IRQ_PIC1); |
50 | 50 | ||
51 | /* ICW4: i8086 mode */ |
51 | /* ICW4: i8086 mode */ |
52 | outb(PIC_PIC0PORT2, 1); |
52 | outb(PIC_PIC0PORT2, 1); |
53 | 53 | ||
54 | /* ICW1: ICW1, ICW4 to follow */ |
54 | /* ICW1: ICW1, ICW4 to follow */ |
55 | outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4); |
55 | outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4); |
56 | 56 | ||
57 | /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ |
57 | /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */ |
58 | outb(PIC_PIC1PORT2, IVT_IRQBASE + 8); |
58 | outb(PIC_PIC1PORT2, IVT_IRQBASE + 8); |
59 | 59 | ||
60 | /* ICW3: pic1 is known as PIC_PIC1ID */ |
60 | /* ICW3: pic1 is known as PIC_PIC1ID */ |
61 | outb(PIC_PIC1PORT2, PIC_PIC1ID); |
61 | outb(PIC_PIC1PORT2, PIC_PIC1ID); |
62 | 62 | ||
63 | /* ICW4: i8086 mode */ |
63 | /* ICW4: i8086 mode */ |
64 | outb(PIC_PIC1PORT2, 1); |
64 | outb(PIC_PIC1PORT2, 1); |
65 | 65 | ||
66 | /* |
66 | /* |
67 | * Register interrupt handler for the PIC spurious interrupt. |
67 | * Register interrupt handler for the PIC spurious interrupt. |
68 | */ |
68 | */ |
Line 73... | Line 73... | ||
73 | * Set the End-of-Interrupt handler. |
73 | * Set the End-of-Interrupt handler. |
74 | */ |
74 | */ |
75 | enable_irqs_function = pic_enable_irqs; |
75 | enable_irqs_function = pic_enable_irqs; |
76 | disable_irqs_function = pic_disable_irqs; |
76 | disable_irqs_function = pic_disable_irqs; |
77 | eoi_function = pic_eoi; |
77 | eoi_function = pic_eoi; |
78 | 78 | ||
79 | pic_disable_irqs(0xffff); /* disable all irq's */ |
79 | pic_disable_irqs(0xffff); /* disable all irq's */ |
80 | pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */ |
80 | pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */ |
81 | } |
81 | } |
82 | 82 | ||
83 | void pic_enable_irqs(__u16 irqmask) |
83 | void pic_enable_irqs(__u16 irqmask) |
84 | { |
84 | { |
85 | __u8 x; |
85 | __u8 x; |
86 | 86 | ||
87 | if (irqmask & 0xff) { |
87 | if (irqmask & 0xff) { |
88 | x = inb(PIC_PIC0PORT2); |
88 | x = inb(PIC_PIC0PORT2); |
89 | outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff))); |
89 | outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff))); |
90 | } |
90 | } |
91 | if (irqmask >> 8) { |
91 | if (irqmask >> 8) { |
92 | x = inb(PIC_PIC1PORT2); |
92 | x = inb(PIC_PIC1PORT2); |
93 | outb(PIC_PIC1PORT2, x & (~(irqmask >> 8))); |
93 | outb(PIC_PIC1PORT2, x & (~(irqmask >> 8))); |
94 | } |
94 | } |
95 | } |
95 | } |
96 | 96 | ||
97 | void pic_disable_irqs(__u16 irqmask) |
97 | void pic_disable_irqs(__u16 irqmask) |
98 | { |
98 | { |
99 | __u8 x; |
99 | __u8 x; |
100 | 100 | ||
101 | if (irqmask & 0xff) { |
101 | if (irqmask & 0xff) { |
102 | x = inb(PIC_PIC0PORT2); |
102 | x = inb(PIC_PIC0PORT2); |
103 | outb(PIC_PIC0PORT2, x | (irqmask & 0xff)); |
103 | outb(PIC_PIC0PORT2, x | (irqmask & 0xff)); |
104 | } |
104 | } |
105 | if (irqmask >> 8) { |
105 | if (irqmask >> 8) { |
106 | x = inb(PIC_PIC1PORT2); |
106 | x = inb(PIC_PIC1PORT2); |
107 | outb(PIC_PIC1PORT2, x | (irqmask >> 8)); |
107 | outb(PIC_PIC1PORT2, x | (irqmask >> 8)); |
108 | } |
108 | } |
109 | } |
109 | } |
110 | 110 | ||
111 | void pic_eoi(void) |
111 | void pic_eoi(void) |
112 | { |
112 | { |
113 | outb(0x20,0x20); |
113 | outb(0x20,0x20); |
114 | outb(0xa0,0x20); |
114 | outb(0xa0,0x20); |
115 | } |
115 | } |
116 | 116 | ||
117 | void pic_spurious(__u8 n, __u32 stack[]) |
117 | void pic_spurious(__u8 n, __u32 stack[]) |
118 | { |
118 | { |
119 | printf("cpu%d: PIC spurious interrupt\n", CPU->id); |
119 | printf("cpu%d: PIC spurious interrupt\n", CPU->id); |