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129 | * @param port Port to read from |
129 | * @param port Port to read from |
130 | * @return Value read |
130 | * @return Value read |
131 | */ |
131 | */ |
132 | static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; } |
132 | static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; } |
133 | 133 | ||
134 | /** Set priority level low |
134 | /** Enable interrupts. |
135 | * |
135 | * |
136 | * Enable interrupts and return previous |
136 | * Enable interrupts and return previous |
137 | * value of EFLAGS. |
137 | * value of EFLAGS. |
- | 138 | * |
|
- | 139 | * @return Old interrupt priority level. |
|
138 | */ |
140 | */ |
139 | static inline pri_t cpu_priority_low(void) { |
141 | static inline ipl_t interrupts_enable(void) { |
140 | pri_t v; |
142 | ipl_t v; |
141 | __asm__ volatile ( |
143 | __asm__ volatile ( |
142 | "pushf\n\t" |
144 | "pushf\n\t" |
143 | "popl %0\n\t" |
145 | "popl %0\n\t" |
144 | "sti\n" |
146 | "sti\n" |
145 | : "=r" (v) |
147 | : "=r" (v) |
146 | ); |
148 | ); |
147 | return v; |
149 | return v; |
148 | } |
150 | } |
149 | 151 | ||
150 | /** Set priority level high |
152 | /** Disable interrupts. |
151 | * |
153 | * |
152 | * Disable interrupts and return previous |
154 | * Disable interrupts and return previous |
153 | * value of EFLAGS. |
155 | * value of EFLAGS. |
- | 156 | * |
|
- | 157 | * @return Old interrupt priority level. |
|
154 | */ |
158 | */ |
155 | static inline pri_t cpu_priority_high(void) { |
159 | static inline ipl_t interrupts_disable(void) { |
156 | pri_t v; |
160 | ipl_t v; |
157 | __asm__ volatile ( |
161 | __asm__ volatile ( |
158 | "pushf\n\t" |
162 | "pushf\n\t" |
159 | "popl %0\n\t" |
163 | "popl %0\n\t" |
160 | "cli\n" |
164 | "cli\n" |
161 | : "=r" (v) |
165 | : "=r" (v) |
162 | ); |
166 | ); |
163 | return v; |
167 | return v; |
164 | } |
168 | } |
165 | 169 | ||
166 | /** Restore priority level |
170 | /** Restore interrupt priority level. |
167 | * |
171 | * |
168 | * Restore EFLAGS. |
172 | * Restore EFLAGS. |
- | 173 | * |
|
- | 174 | * @param ipl Saved interrupt priority level. |
|
169 | */ |
175 | */ |
170 | static inline void cpu_priority_restore(pri_t pri) { |
176 | static inline void interrupts_restore(ipl_t ipl) { |
171 | __asm__ volatile ( |
177 | __asm__ volatile ( |
172 | "pushl %0\n\t" |
178 | "pushl %0\n\t" |
173 | "popf\n" |
179 | "popf\n" |
174 | : : "r" (pri) |
180 | : : "r" (ipl) |
175 | ); |
181 | ); |
176 | } |
182 | } |
177 | 183 | ||
178 | /** Return raw priority level |
184 | /** Return interrupt priority level. |
179 | * |
185 | * |
180 | * Return EFLAFS. |
186 | * @return EFLAFS. |
181 | */ |
187 | */ |
182 | static inline pri_t cpu_priority_read(void) { |
188 | static inline ipl_t interrupts_read(void) { |
183 | pri_t v; |
189 | ipl_t v; |
184 | __asm__ volatile ( |
190 | __asm__ volatile ( |
185 | "pushf\n\t" |
191 | "pushf\n\t" |
186 | "popl %0\n" |
192 | "popl %0\n" |
187 | : "=r" (v) |
193 | : "=r" (v) |
188 | ); |
194 | ); |