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Line 54... Line 54...
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    current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
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    current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
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    return ipl;
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    return ipl;
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}
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}
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-
 
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/** Enable interrupts.
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/** Enable interrupts.
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 *
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 *
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 * @return Old interrupt priority level.
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 * @return Old interrupt priority level.
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 */
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 */
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ipl_t interrupts_enable(void)
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ipl_t interrupts_enable(void)
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    current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
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    current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
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    return ipl;
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    return ipl;
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}
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}
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-
 
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/** Restore interrupt priority level.
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/** Restore interrupt priority level.
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 *
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 *
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 * @param ipl Saved interrupt priority level.
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 * @param ipl Saved interrupt priority level.
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 */
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 */
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void interrupts_restore(ipl_t ipl)
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void interrupts_restore(ipl_t ipl)
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        (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
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        (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
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        (ipl & STATUS_REG_IRQ_DISABLED_BIT)
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        (ipl & STATUS_REG_IRQ_DISABLED_BIT)
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    );
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    );
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}
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}
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-
 
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/** Read interrupt priority level.
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/** Read interrupt priority level.
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 *
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 *
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 * @return Current interrupt priority level.
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 * @return Current interrupt priority level.
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 */
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 */
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ipl_t interrupts_read(void)
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ipl_t interrupts_read(void)
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{
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{
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    return current_status_reg_read();
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    return current_status_reg_read();
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}
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}
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-
 
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/** Initialize basic tables for exception dispatching
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/** Initialize basic tables for exception dispatching
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 * and starts the timer.
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 * and starts the timer.
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 */
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 */
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void interrupt_init(void)
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void interrupt_init(void)
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{
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{