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43 | 43 | ||
44 | #define EXC_COUNT 32 |
44 | #define EXC_COUNT 32 |
45 | #define IRQ_COUNT 16 |
45 | #define IRQ_COUNT 16 |
46 | 46 | ||
47 | #define IVT_EXCBASE 0 |
47 | #define IVT_EXCBASE 0 |
48 | #define IVT_IRQBASE (IVT_EXCBASE+EXC_COUNT) |
48 | #define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT) |
49 | #define IVT_FREEBASE (IVT_IRQBASE+IRQ_COUNT) |
49 | #define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT) |
50 | 50 | ||
51 | #define IRQ_CLK 0 |
51 | #define IRQ_CLK 0 |
52 | #define IRQ_KBD 1 |
52 | #define IRQ_KBD 1 |
53 | #define IRQ_PIC1 2 |
53 | #define IRQ_PIC1 2 |
54 | #define IRQ_PIC_SPUR 7 |
54 | #define IRQ_PIC_SPUR 7 |
- | 55 | #define IRQ_MOUSE 12 |
|
55 | 56 | ||
56 | /* this one must have four least significant bits set to ones */ |
57 | /* this one must have four least significant bits set to ones */ |
57 | #define VECTOR_APIC_SPUR (IVT_ITEMS-1) |
58 | #define VECTOR_APIC_SPUR (IVT_ITEMS - 1) |
58 | 59 | ||
59 | #if (((VECTOR_APIC_SPUR + 1)%16) || VECTOR_APIC_SPUR >= IVT_ITEMS) |
60 | #if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS) |
60 | #error Wrong definition of VECTOR_APIC_SPUR |
61 | #error Wrong definition of VECTOR_APIC_SPUR |
61 | #endif |
62 | #endif |
62 | 63 | ||
63 | #define VECTOR_DEBUG 1 |
64 | #define VECTOR_DEBUG 1 |
64 | #define VECTOR_PIC_SPUR (IVT_IRQBASE+IRQ_PIC_SPUR) |
65 | #define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK) |
65 | #define VECTOR_CLK (IVT_IRQBASE+IRQ_CLK) |
66 | #define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR) |
66 | #define VECTOR_KBD (IVT_IRQBASE+IRQ_KBD) |
67 | #define VECTOR_SYSCALL IVT_FREEBASE |
67 | - | ||
68 | #define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE+0) |
68 | #define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1) |
69 | #define VECTOR_WAKEUP_IPI (IVT_FREEBASE+1) |
69 | #define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) |
70 | #define VECTOR_DEBUG_IPI (IVT_FREEBASE+2) |
- | |
71 | 70 | ||
72 | /** This is passed to interrupt handlers */ |
71 | /** This is passed to interrupt handlers */ |
73 | struct istate { |
72 | struct istate { |
74 | uint64_t rax; |
73 | uint64_t rax; |
75 | uint64_t rbx; |
74 | uint64_t rbx; |
Line 110... | Line 109... | ||
110 | 109 | ||
111 | extern void (* disable_irqs_function)(uint16_t irqmask); |
110 | extern void (* disable_irqs_function)(uint16_t irqmask); |
112 | extern void (* enable_irqs_function)(uint16_t irqmask); |
111 | extern void (* enable_irqs_function)(uint16_t irqmask); |
113 | extern void (* eoi_function)(void); |
112 | extern void (* eoi_function)(void); |
114 | 113 | ||
115 | extern void print_info_errcode(int n, istate_t *istate); |
- | |
116 | extern void null_interrupt(int n, istate_t *istate); |
- | |
117 | extern void gp_fault(int n, istate_t *istate); |
114 | extern void decode_istate(int n, istate_t *istate); |
118 | extern void nm_fault(int n, istate_t *istate); |
115 | extern void interrupt_init(void); |
119 | extern void ss_fault(int n, istate_t *istate); |
- | |
120 | extern void page_fault(int n, istate_t *istate); |
- | |
121 | extern void syscall(int n, istate_t *istate); |
- | |
122 | extern void tlb_shootdown_ipi(int n, istate_t *istate); |
- | |
123 | - | ||
124 | extern void trap_virtual_enable_irqs(uint16_t irqmask); |
116 | extern void trap_virtual_enable_irqs(uint16_t irqmask); |
125 | extern void trap_virtual_disable_irqs(uint16_t irqmask); |
117 | extern void trap_virtual_disable_irqs(uint16_t irqmask); |
126 | extern void trap_virtual_eoi(void); |
- | |
127 | /* AMD64 - specific page handler */ |
118 | /* AMD64 - specific page handler */ |
128 | extern void ident_page_fault(int n, istate_t *istate); |
119 | extern void ident_page_fault(int n, istate_t *istate); |
129 | 120 | ||
130 | #endif |
121 | #endif |
131 | 122 |