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Rev 282 | Rev 348 | ||
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Line 49... | Line 49... | ||
49 | __asm__ volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((__u64)STACK_SIZE-1))); |
49 | __asm__ volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((__u64)STACK_SIZE-1))); |
50 | 50 | ||
51 | return v; |
51 | return v; |
52 | } |
52 | } |
53 | 53 | ||
54 | static inline void cpu_sleep(void) { __asm__ volatile ("hlt"); }; |
54 | static inline void cpu_sleep(void) { __asm__ volatile ("hlt\n"); }; |
55 | static inline void cpu_halt(void) { __asm__ volatile ("hlt"); }; |
55 | static inline void cpu_halt(void) { __asm__ volatile ("hlt\n"); }; |
56 | 56 | ||
57 | 57 | ||
58 | static inline __u8 inb(__u16 port) |
58 | static inline __u8 inb(__u16 port) |
59 | { |
59 | { |
60 | __u8 out; |
60 | __u8 out; |
61 | 61 | ||
62 | __asm__ volatile ( |
62 | __asm__ volatile ( |
63 | "mov %1, %%dx;" |
63 | "mov %1, %%dx\n" |
64 | "inb %%dx,%%al;" |
64 | "inb %%dx,%%al\n" |
65 | "mov %%al, %0;" |
65 | "mov %%al, %0\n" |
66 | :"=m"(out) |
66 | :"=m"(out) |
67 | :"m"(port) |
67 | :"m"(port) |
68 | :"%rdx","%rax" |
68 | :"%rdx","%rax" |
69 | ); |
69 | ); |
70 | return out; |
70 | return out; |
71 | } |
71 | } |
72 | 72 | ||
73 | static inline __u8 outb(__u16 port,__u8 b) |
73 | static inline __u8 outb(__u16 port,__u8 b) |
74 | { |
74 | { |
75 | __asm__ volatile ( |
75 | __asm__ volatile ( |
76 | "mov %0,%%dx;" |
76 | "mov %0,%%dx\n" |
77 | "mov %1,%%al;" |
77 | "mov %1,%%al\n" |
78 | "outb %%al,%%dx;" |
78 | "outb %%al,%%dx\n" |
79 | : |
79 | : |
80 | :"m"( port), "m" (b) |
80 | :"m"( port), "m" (b) |
81 | :"%rdx","%rax" |
81 | :"%rdx","%rax" |
82 | ); |
82 | ); |
83 | } |
83 | } |
Line 147... | Line 147... | ||
147 | * @return Value read. |
147 | * @return Value read. |
148 | */ |
148 | */ |
149 | static inline __u64 read_cr0(void) |
149 | static inline __u64 read_cr0(void) |
150 | { |
150 | { |
151 | __u64 v; |
151 | __u64 v; |
152 | __asm__ volatile ("movq %%cr0,%0" : "=r" (v)); |
152 | __asm__ volatile ("movq %%cr0,%0\n" : "=r" (v)); |
153 | return v; |
153 | return v; |
154 | } |
154 | } |
155 | 155 | ||
156 | /** Read CR2 |
156 | /** Read CR2 |
157 | * |
157 | * |
Line 160... | Line 160... | ||
160 | * @return Value read. |
160 | * @return Value read. |
161 | */ |
161 | */ |
162 | static inline __u64 read_cr2(void) |
162 | static inline __u64 read_cr2(void) |
163 | { |
163 | { |
164 | __u64 v; |
164 | __u64 v; |
165 | __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); |
165 | __asm__ volatile ("movq %%cr2,%0\n" : "=r" (v)); |
166 | return v; |
166 | return v; |
167 | } |
167 | } |
168 | 168 | ||
169 | /** Write CR3 |
169 | /** Write CR3 |
170 | * |
170 | * |
Line 196... | Line 196... | ||
196 | * Enable local APIC in MSR. |
196 | * Enable local APIC in MSR. |
197 | */ |
197 | */ |
198 | static inline void enable_l_apic_in_msr() |
198 | static inline void enable_l_apic_in_msr() |
199 | { |
199 | { |
200 | __asm__ volatile ( |
200 | __asm__ volatile ( |
201 | "movl $0x1b, %%ecx;" |
201 | "movl $0x1b, %%ecx\n" |
202 | "rdmsr;" |
202 | "rdmsr\n" |
203 | "orl $(1<<11),%%eax;" |
203 | "orl $(1<<11),%%eax\n" |
204 | "orl $(0xfee00000),%%eax;" |
204 | "orl $(0xfee00000),%%eax\n" |
205 | "wrmsr;" |
205 | "wrmsr\n" |
206 | : |
206 | : |
207 | : |
207 | : |
208 | :"%eax","%ecx","%edx" |
208 | :"%eax","%ecx","%edx" |
209 | ); |
209 | ); |
210 | } |
210 | } |