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Rev 4095 | Rev 4126 | ||
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Line 340... | Line 340... | ||
340 | /** Load GDTR register from memory. |
340 | /** Load GDTR register from memory. |
341 | * |
341 | * |
342 | * @param gdtr_reg Address of memory from where to load GDTR. |
342 | * @param gdtr_reg Address of memory from where to load GDTR. |
343 | * |
343 | * |
344 | */ |
344 | */ |
345 | static inline void gdtr_load(struct ptr_16_64 *gdtr_reg) |
345 | static inline void gdtr_load(ptr_16_64_t *gdtr_reg) |
346 | { |
346 | { |
347 | asm volatile ( |
347 | asm volatile ( |
348 | "lgdtq %[gdtr_reg]\n" |
348 | "lgdtq %[gdtr_reg]\n" |
349 | :: [gdtr_reg] "m" (*gdtr_reg) |
349 | :: [gdtr_reg] "m" (*gdtr_reg) |
350 | ); |
350 | ); |
Line 353... | Line 353... | ||
353 | /** Store GDTR register to memory. |
353 | /** Store GDTR register to memory. |
354 | * |
354 | * |
355 | * @param gdtr_reg Address of memory to where to load GDTR. |
355 | * @param gdtr_reg Address of memory to where to load GDTR. |
356 | * |
356 | * |
357 | */ |
357 | */ |
358 | static inline void gdtr_store(struct ptr_16_64 *gdtr_reg) |
358 | static inline void gdtr_store(ptr_16_64_t *gdtr_reg) |
359 | { |
359 | { |
360 | asm volatile ( |
360 | asm volatile ( |
361 | "sgdtq %[gdtr_reg]\n" |
361 | "sgdtq %[gdtr_reg]\n" |
362 | :: [gdtr_reg] "m" (*gdtr_reg) |
362 | :: [gdtr_reg] "m" (*gdtr_reg) |
363 | ); |
363 | ); |
Line 366... | Line 366... | ||
366 | /** Load IDTR register from memory. |
366 | /** Load IDTR register from memory. |
367 | * |
367 | * |
368 | * @param idtr_reg Address of memory from where to load IDTR. |
368 | * @param idtr_reg Address of memory from where to load IDTR. |
369 | * |
369 | * |
370 | */ |
370 | */ |
371 | static inline void idtr_load(struct ptr_16_64 *idtr_reg) |
371 | static inline void idtr_load(ptr_16_64_t *idtr_reg) |
372 | { |
372 | { |
373 | asm volatile ( |
373 | asm volatile ( |
374 | "lidtq %[idtr_reg]\n" |
374 | "lidtq %[idtr_reg]\n" |
375 | :: [idtr_reg] "m" (*idtr_reg)); |
375 | :: [idtr_reg] "m" (*idtr_reg)); |
376 | } |
376 | } |