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56 | #define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) |
56 | #define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) |
57 | #define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) |
57 | #define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) |
58 | #define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it)))) |
58 | #define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it)))) |
59 | #define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it)))) |
59 | #define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it)))) |
60 | 60 | ||
- | 61 | #define GEN_READ_CP0(nm,reg) static inline __u32 cp0_ ##nm##_read(void) \ |
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- | 62 | { \ |
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61 | extern __u32 cp0_index_read(void); |
63 | __u32 retval; \ |
62 | extern void cp0_index_write(__u32 val); |
64 | asm("mfc0 %0, $" #reg : "=r"(retval)); \ |
- | 65 | return retval; \ |
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- | 66 | } |
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63 | 67 | ||
- | 68 | #define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(__u32 val) \ |
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- | 69 | { \ |
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64 | extern __u32 cp0_random_read(void); |
70 | asm("mtc0 %0, $" #reg : : "r"(val) ); \ |
- | 71 | } |
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65 | 72 | ||
66 | extern __u32 cp0_entry_lo0_read(void); |
73 | GEN_READ_CP0(index, 0); |
67 | extern void cp0_entry_lo0_write(__u32 val); |
74 | GEN_WRITE_CP0(index, 0); |
68 | 75 | ||
69 | extern __u32 cp0_entry_lo1_read(void); |
76 | GEN_READ_CP0(random, 1); |
70 | extern void cp0_entry_lo1_write(__u32 val); |
- | |
71 | 77 | ||
72 | extern __u32 cp0_context_read(void); |
78 | GEN_READ_CP0(entry_lo0, 2); |
73 | extern void cp0_context_write(__u32 val); |
79 | GEN_WRITE_CP0(entry_lo0, 2); |
74 | 80 | ||
75 | extern __u32 cp0_pagemask_read(void); |
81 | GEN_READ_CP0(entry_lo1, 3); |
76 | extern void cp0_pagemask_write(__u32 val); |
82 | GEN_WRITE_CP0(entry_lo1, 3); |
77 | 83 | ||
78 | extern __u32 cp0_wired_read(void); |
84 | GEN_READ_CP0(context, 4); |
79 | extern void cp0_wired_write(__u32 val); |
85 | GEN_WRITE_CP0(context, 4); |
80 | 86 | ||
81 | extern __u32 cp0_badvaddr_read(void); |
87 | GEN_READ_CP0(pagemask, 5); |
- | 88 | GEN_WRITE_CP0(pagemask, 5); |
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82 | 89 | ||
83 | extern __u32 cp0_count_read(void); |
90 | GEN_READ_CP0(wired, 6); |
84 | extern void cp0_count_write(__u32 val); |
91 | GEN_WRITE_CP0(wired, 6); |
85 | 92 | ||
86 | extern __u32 cp0_entry_hi_read(void); |
93 | GEN_READ_CP0(badvaddr, 8); |
87 | extern void cp0_entry_hi_write(__u32 val); |
- | |
88 | 94 | ||
89 | extern __u32 cp0_compare_read(void); |
95 | GEN_READ_CP0(count, 9); |
90 | extern void cp0_compare_write(__u32 val); |
96 | GEN_WRITE_CP0(count, 9); |
91 | 97 | ||
92 | extern __u32 cp0_status_read(void); |
98 | GEN_READ_CP0(entry_hi, 10); |
93 | extern void cp0_status_write(__u32 val); |
99 | GEN_WRITE_CP0(entry_hi, 10); |
94 | 100 | ||
95 | extern __u32 cp0_cause_read(void); |
101 | GEN_READ_CP0(compare, 11); |
96 | extern void cp0_cause_write(__u32 val); |
102 | GEN_WRITE_CP0(compare, 11); |
97 | 103 | ||
98 | extern __u32 cp0_epc_read(void); |
104 | GEN_READ_CP0(status, 12); |
99 | extern void cp0_epc_write(__u32 val); |
105 | GEN_WRITE_CP0(status, 12); |
100 | 106 | ||
- | 107 | GEN_READ_CP0(cause, 13); |
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- | 108 | GEN_WRITE_CP0(cause, 13); |
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- | 109 | ||
- | 110 | GEN_READ_CP0(epc, 14); |
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- | 111 | GEN_WRITE_CP0(epc, 14); |
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- | 112 | ||
101 | extern __u32 cp0_prid_read(void); |
113 | GEN_READ_CP0(prid, 15); |
102 | 114 | ||
103 | #endif |
115 | #endif |