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    /*
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    /*
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     * Switch to BEV normal level so that exception vectors point to the kernel.
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     * Switch to BEV normal level so that exception vectors point to the kernel.
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     * Clear the error level.
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     * Clear the error level.
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     */
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     */
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    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
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    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
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    /*
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    /*
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     * Unmask hardware clock interrupt.
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     * Unmask hardware clock interrupt.
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     */
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     */
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    cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
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    cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
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    /*
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    /*
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     * Start hardware clock.
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     * Start hardware clock.
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     */
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     */
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    cp0_compare_write(cp0_compare_value);
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    cp0_compare_write(cp0_compare_value);
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    cp0_count_write(0);
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    cp0_count_write(0);