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 */
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 */
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#include <arch/mm/page.h>
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#include <arch/mm/page.h>
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#include <genarch/mm/page_ht.h>
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#include <genarch/mm/page_ht.h>
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#include <mm/asid.h>
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#include <mm/asid.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <print.h>
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#include <print.h>
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#include <mm/page.h>
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#include <mm/page.h>
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#include <mm/frame.h>
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#include <mm/frame.h>
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#include <config.h>
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#include <config.h>
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#include <panic.h>
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#include <panic.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <arch/barrier.h>
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#include <memstr.h>
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#include <memstr.h>
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static void set_vhpt_environment(void);
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/** Initialize ia64 virtual address translation subsystem. */
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void page_arch_init(void)
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{
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    page_operations = &page_ht_operations;
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    pk_disable();
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    set_vhpt_environment();
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}
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/** Initialize VHPT and region registers. */
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/** Initialize VHPT and region registers. */
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static void set_vhpt_environment(void)
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void set_vhpt_environment(void)
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{
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{
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    region_register rr;
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    region_register rr;
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    pta_register pta;  
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    pta_register pta;  
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    int i;
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    int i;
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    pta_write(pta.word);
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    pta_write(pta.word);
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    srlz_i();
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    srlz_i();
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    srlz_d();
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    srlz_d();
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}
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}
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/** Initialize ia64 virtual address translation subsystem. */
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void page_arch_init(void)
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{
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    page_operations = &page_ht_operations;
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    pk_disable();
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    set_vhpt_environment();
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}
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/** Calculate address of collision chain from VPN and ASID.
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/** Calculate address of collision chain from VPN and ASID.
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 *
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 *
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 * This is rather non-trivial function.
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 * First, it has to translate ASID to RID.
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 * This is achieved by taking VRN bits of
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 * page into account.
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 * Second, it must preserve the region register
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 * it writes the RID to.
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 * Interrupts must be disabled.
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 *
112
 *
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 * @param page Address of virtual page including VRN bits.
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 * @param asid Address space identifier.
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 *
115
 *
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 * @return Head of VHPT collision chain for page and asid.
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 * @return Head of VHPT collision chain for page and asid.
118
 */
117
 */
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pte_t *vhpt_hash(__address page, asid_t asid)
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pte_t *vhpt_hash(__address page, asid_t asid)
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{
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{
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    region_register rr_save, rr;
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    region_register rr_save, rr;
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    index_t vrn;
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    rid_t rid;
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    pte_t *t;
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    pte_t *t;
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    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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124
    rr_save.word = rr_read(VRN_WORK);
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    rr_save.word = rr_read(vrn);
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    if (rr_save.map.rid == rid) {
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        /*
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         * The RID is already in place, compute thash and return.
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         */
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        t = (pte_t *) thash(page);
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        return t;
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    }
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    /*
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     * The RID must be written to some region register.
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     * To speed things up, register indexed by vrn is used.
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     */
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    rr.word = rr_save.word;
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    rr.word = rr_save.word;
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    if ((page >> VRN_SHIFT) != VRN_KERNEL)
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        rr.map.rid = (asid * RIDS_PER_ASID) + (page >> VRN_SHIFT);
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    else
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        rr.map.rid = ASID_KERNEL;
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    rr.map.rid = rid;
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    rr_write(VRN_WORK, rr.word);
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    rr_write(vrn, rr.word);
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    srlz_i();
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    srlz_i();
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    t = (pte_t *) thash((VRN_WORK << VRN_SHIFT) | (~(VRN_MASK) & page));
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    t = (pte_t *) thash(page);
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    rr_write(VRN_WORK, rr_save.word);
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    rr_write(vrn, rr_save.word);
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    srlz_i();
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    srlz_i();
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    srlz_d();
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    srlz_d();
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    return t;
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    return t;
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}
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}
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/** Compare ASID and VPN against PTE.
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 *
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 * Interrupts must be disabled.
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 *
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 * @param page Address of virtual page including VRN bits.
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 * @param asid Address space identifier.
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 *
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 * @return True if page and asid match the page and asid of t, false otherwise.
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 */
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bool vhpt_compare(__address page, asid_t asid, pte_t *t)
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{
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    region_register rr_save, rr;   
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    index_t vrn;
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    rid_t rid;
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    bool match;
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168
 
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169
    ASSERT(t);
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170
 
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    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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    rr_save.word = rr_read(vrn);
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    if (rr_save.map.rid == rid) {
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        /*
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         * The RID is already in place, compare ttag with t and return.
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         */
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        return ttag(page) == t->present.tag.tag_word;
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    }
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182
    /*
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183
     * The RID must be written to some region register.
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184
     * To speed things up, register indexed by vrn is used.
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185
     */
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186
    rr.word = rr_save.word;
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187
    rr.map.rid = rid;
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188
    rr_write(vrn, rr.word);
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189
    srlz_i();
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190
    match = (ttag(page) == t->present.tag.tag_word);
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191
    rr_write(vrn, rr_save.word);
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    srlz_i();
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    srlz_d();
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194
 
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195
    return match;      
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}
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/** Set up one VHPT entry.
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199
 *
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200
 * @param t VHPT entry to be set up.
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 * @param page Virtual address of the page mapped by the entry.
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 * @param asid Address space identifier of the address space to which page belongs.
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 * @param frame Physical address of the frame to wich page is mapped.
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 * @param flags Different flags for the mapping.
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 */
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void vhpt_set_record(pte_t *t, __address page, asid_t asid, __address frame, int flags)
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{
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    region_register rr_save, rr;   
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    index_t vrn;
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210
    rid_t rid;
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211
    __u64 tag;
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212
 
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213
    ASSERT(t);
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214
 
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215
    vrn = page >> VRN_SHIFT;
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    rid = ASID2RID(asid, vrn);
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217
   
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218
    /*
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219
     * Compute ttag.
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220
     */
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221
    rr_save.word = rr_read(vrn);
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222
    rr.word = rr_save.word;
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    rr.map.rid = rid;
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224
    rr_write(vrn, rr.word);
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225
    srlz_i();
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    tag = ttag(page);
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227
    rr_write(vrn, rr_save.word);
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228
    srlz_i();
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229
    srlz_d();
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230
   
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231
    /*
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232
     * Clear the entry.
-
 
233
     */
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234
    t->word[0] = 0;
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235
    t->word[1] = 0;
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236
    t->word[2] = 0;
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237
    t->word[3] = 0;
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238
   
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239
    t->present.p = true;
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    t->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
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    t->present.a = false;   /* not accessed */
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242
    t->present.d = false;   /* not dirty */
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243
    t->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
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244
    t->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
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245
    t->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
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246
    t->present.ppn = frame >> PPN_SHIFT;
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247
    t->present.ed = false;  /* exception not deffered */
-
 
248
    t->present.ps = PAGE_WIDTH;
-
 
249
    t->present.key = 0;
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250
    t->present.tag.tag_word = tag;
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    t->present.next = NULL;
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}