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27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __ia32_BARRIER_H__ |
29 | #ifndef __ia32_BARRIER_H__ |
30 | #define __ia32_BARRIER_H__ |
30 | #define __ia32_BARRIER_H__ |
31 | 31 | ||
- | 32 | #include <arch/types.h> |
|
- | 33 | ||
32 | /* |
34 | /* |
33 | * NOTE: |
35 | * NOTE: |
34 | * No barriers for critical section (i.e. spinlock) on IA-32 are needed: |
36 | * No barriers for critical section (i.e. spinlock) on IA-32 are needed: |
35 | * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction |
37 | * - spinlock_lock() and spinlock_trylock() use serializing XCHG instruction |
36 | * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers |
38 | * - writes cannot pass reads on IA-32 => spinlock_unlock() needs no barriers |
Line 41... | Line 43... | ||
41 | */ |
43 | */ |
42 | 44 | ||
43 | #define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory") |
45 | #define CS_ENTER_BARRIER() __asm__ volatile ("" ::: "memory") |
44 | #define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory") |
46 | #define CS_LEAVE_BARRIER() __asm__ volatile ("" ::: "memory") |
45 | 47 | ||
- | 48 | static inline void cpuid_serialization(void) |
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- | 49 | { |
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- | 50 | __asm__ volatile ( |
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- | 51 | "xorl %%eax, %%eax\n" |
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- | 52 | "cpuid\n" |
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- | 53 | ::: "eax", "ebx", "ecx", "edx", "memory" |
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- | 54 | ); |
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- | 55 | } |
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- | 56 | ||
46 | #ifdef CONFIG_FENCES_P4 |
57 | #ifdef CONFIG_FENCES_P4 |
47 | # define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory") |
58 | # define memory_barrier() __asm__ volatile ("mfence\n" ::: "memory") |
48 | # define read_barrier() __asm__ volatile ("lfence\n" ::: "memory") |
59 | # define read_barrier() __asm__ volatile ("lfence\n" ::: "memory") |
49 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
60 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
50 | #elif CONFIG_FENCES_P3 |
61 | #elif CONFIG_FENCES_P3 |
51 | # define memory_barrier() __asm__ volatile ("\n" ::: "memory") |
62 | # define memory_barrier() cpuid_serialization() |
52 | # define read_barrier() __asm__ volatile ("\n" ::: "memory") |
63 | # define read_barrier() cpuid_serialization() |
53 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
64 | # define write_barrier() __asm__ volatile ("sfence\n" ::: "memory") |
- | 65 | #else |
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- | 66 | # define memory_barrier() cpuid_serialization() |
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- | 67 | # define read_barrier() cpuid_serialization() |
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- | 68 | # define write_barrier() cpuid_serialization() |
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54 | #endif |
69 | #endif |
55 | 70 | ||
56 | #endif |
71 | #endif |