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| Line 33... | Line 33... | ||
| 33 | 33 | ||
| 34 | typedef volatile __u32 atomic_t; |
34 | typedef volatile __u32 atomic_t; |
| 35 | 35 | ||
| 36 | static inline void atomic_inc(atomic_t *val) { |
36 | static inline void atomic_inc(atomic_t *val) { |
| 37 | #ifdef CONFIG_SMP |
37 | #ifdef CONFIG_SMP |
| 38 | __asm__ volatile ("lock incl %0\n" : "+m" (*val)); |
38 | __asm__ volatile ("lock incl %0\n" : "=m" (*val)); |
| 39 | #else |
39 | #else |
| 40 | __asm__ volatile ("incl %0\n" : "+m" (*val)); |
40 | __asm__ volatile ("incl %0\n" : "=m" (*val)); |
| 41 | #endif /* CONFIG_SMP */ |
41 | #endif /* CONFIG_SMP */ |
| 42 | } |
42 | } |
| 43 | 43 | ||
| 44 | static inline void atomic_dec(atomic_t *val) { |
44 | static inline void atomic_dec(atomic_t *val) { |
| 45 | #ifdef CONFIG_SMP |
45 | #ifdef CONFIG_SMP |
| 46 | __asm__ volatile ("lock decl %0\n" : "+m" (*val)); |
46 | __asm__ volatile ("lock decl %0\n" : "=m" (*val)); |
| 47 | #else |
47 | #else |
| 48 | __asm__ volatile ("decl %0\n" : "+m" (*val)); |
48 | __asm__ volatile ("decl %0\n" : "=m" (*val)); |
| 49 | #endif /* CONFIG_SMP */ |
49 | #endif /* CONFIG_SMP */ |
| 50 | } |
50 | } |
| 51 | 51 | ||
| 52 | static inline atomic_t atomic_inc_pre(atomic_t *val) |
52 | static inline atomic_t atomic_inc_pre(atomic_t *val) |
| 53 | { |
53 | { |
| 54 | atomic_t r; |
54 | atomic_t r; |
| 55 | __asm__ volatile ( |
55 | __asm__ volatile ( |
| 56 | "movl $1,%0;" |
56 | "movl $1,%0;" |
| 57 | "lock xaddl %0,%1;" |
57 | "lock xaddl %0,%1;" |
| 58 | : "=r"(r), "+m" (*val) |
58 | : "=r"(r), "=m" (*val) |
| 59 | ); |
59 | ); |
| 60 | return r; |
60 | return r; |
| 61 | } |
61 | } |
| 62 | 62 | ||
| 63 | 63 | ||
| Line 66... | Line 66... | ||
| 66 | { |
66 | { |
| 67 | atomic_t r; |
67 | atomic_t r; |
| 68 | __asm__ volatile ( |
68 | __asm__ volatile ( |
| 69 | "movl $-1,%0;" |
69 | "movl $-1,%0;" |
| 70 | "lock xaddl %0,%1;" |
70 | "lock xaddl %0,%1;" |
| 71 | : "=r"(r), "+m" (*val) |
71 | : "=r"(r), "=m" (*val) |
| 72 | ); |
72 | ); |
| 73 | return r; |
73 | return r; |
| 74 | } |
74 | } |
| 75 | 75 | ||
| 76 | #define atomic_inc_post(val) (atomic_inc_pre(val)+1) |
76 | #define atomic_inc_post(val) (atomic_inc_pre(val)+1) |
| Line 82... | Line 82... | ||
| 82 | int v; |
82 | int v; |
| 83 | 83 | ||
| 84 | __asm__ volatile ( |
84 | __asm__ volatile ( |
| 85 | "movl $1, %0\n" |
85 | "movl $1, %0\n" |
| 86 | "xchgl %0, %1\n" |
86 | "xchgl %0, %1\n" |
| 87 | : "=r" (v),"+m" (*val) |
87 | : "=r" (v),"=m" (*val) |
| 88 | ); |
88 | ); |
| 89 | 89 | ||
| 90 | return v; |
90 | return v; |
| 91 | } |
91 | } |
| 92 | 92 | ||