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      <section>
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      <section>
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        <title>Address space areas</title>
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        <title>Address space areas</title>
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        <para>Each address space consists of mutually disjunctive continuous
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        <para>Each address space consists of mutually disjunctive continuous
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        address space areas. Address space area is precisely defined by its
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        address space areas. Address space area is precisely defined by its
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        base address and the number of frames is contains.</para>
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        base address and the number of frames/pages is contains.</para>
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        <para>Address space area also has special flags, that define behaviour
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        <para>Address space area , that define behaviour and permissions on
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        and permissions on the particular area. <itemizedlist>
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        the particular area. <itemizedlist>
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            <listitem>
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            <listitem>
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              <emphasis>AS_AREA_READ</emphasis>
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              <emphasis>AS_AREA_READ</emphasis>
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      <section>
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      <section>
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        <title>Address Space ID (ASID)</title>
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        <title>Address Space ID (ASID)</title>
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        <para>When switching to the different task, kernel also require to
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        <para>When switching to the different task, kernel also require to
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        switch mappings to the different address space. In case TLB cannot
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        switch mappings to the different address space. In case TLB cannot
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        distinguish address space mappings, all mappings from the old address
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        distinguish address space mappings, all mapping information in TLB
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        space should be flushed, which can create certain uncessary
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        from the old address space must be flushed, which can create certain
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        overhead.</para>
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        <para>To avoid this, some architectures have capability to segregate
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        uncessary overhead during the task switching. To avoid this, some
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        different address spaces on HW level introducing the ASID (address
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        architectures have capability to segregate different address spaces on
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        space ID). On those architectures each TLB record contains an address
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        hardware level introducing the address space identifier as a part of
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        space identifier, that tells to which address space this record is
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        TLB record, telling the virtual address space translation unit to
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        applicable.</para>
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        which address space this record is applicable.</para>
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        <para>HelenOS kernel can take advantage of this hardware supported
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        <para>HelenOS kernel can take advantage of this hardware supported
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        identifier by having an ASID abstraction which is connected to the
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        identifier by having an ASID abstraction which is somehow related to
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        corresponding architecture identifier. I.e. on ia64 kernel ASID is
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        the corresponding architecture identifier. I.e. on ia64 kernel ASID is
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        built from RID (region identifier) and on the mips32 kernel ASID is
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        derived from RID (region identifier) and on the mips32 kernel ASID is
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        actually the hardware identifier.</para>
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        actually the hardware identifier. As expected, this ASID information
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        record is the part of <emphasis>as_t</emphasis> structure.</para>
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        <para>Due to the hardware limitations ASID has limited length from 8
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        <para>Due to the hardware limitations, hardware ASID has limited
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        bits on ia64 to 24 bits on mips32, which makes it impossible to use as
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        length from 8 bits on ia64 to 24 bits on mips32, which makes it
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        unique address space identifier for all tasks running in the system.
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        impossible to use it as unique address space identifier for all tasks
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        In such situations special ASID stealing algoritm is used, which takes
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        running in the system. In such situations special ASID stealing
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        algoritm is used, which takes ASID from inactive task and assigns it
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        to the active task.</para>
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        ASID from inactive task and assigns it to the active task.</para>
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        <para><classname>ASID stealing algoritm here.</classname></para>
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      </section>
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      </section>
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    </section>
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    </section>
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    <section>
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    <section>
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      <title>Virtual address translation</title>
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      <title>Virtual address translation</title>
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        <title>Page tables</title>
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        <title>Page tables</title>
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        <para>HelenOS kernel has two different approaches to the paging
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        <para>HelenOS kernel has two different approaches to the paging
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        implementation: <emphasis>4 level page tables</emphasis> and
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        implementation: <emphasis>4 level page tables</emphasis> and
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        <emphasis>global hash tables</emphasis>, which are accessible via
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        <emphasis>global hash tables</emphasis>, which are accessible via
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        generic paging abstraction layer. This division was caused by the
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        generic paging abstraction layer. Such different functionality was
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        major architectural differences between different platforms.</para>
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        caused by the major architectural differences between supported
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        platforms. This abstraction is implemented with help of the global
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        structure of pointers to basic mapping functions
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        <emphasis>page_mapping_operations</emphasis>. To achieve different
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        functionality of page tables, corresponding layer must implement
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        functions, declared in
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        <emphasis>page_mapping_operations</emphasis></para>
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        <formalpara>
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        <formalpara>
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          <title>4-level page tables</title>
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          <title>4-level page tables</title>
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          <para>4-level page tables are the generalization of the hardware
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          <para>4-level page tables are the generalization of the hardware
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          capabilities of the certain platforms. <itemizedlist>
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          capabilities of several architectures.<itemizedlist>
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              <listitem>
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              <listitem>
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                 ia32 uses 2-level page tables, with full hardware support.
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                 ia32 uses 2-level page tables, with full hardware support.
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              </listitem>
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              </listitem>
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              <listitem>
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              <listitem>