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Line 52... Line 52...
52
 
52
 
53
#ifdef CONFIG_TSB
53
#ifdef CONFIG_TSB
54
#include <arch/mm/tsb.h>
54
#include <arch/mm/tsb.h>
55
#endif
55
#endif
56
 
56
 
57
static void dtlb_pte_copy(pte_t *t, index_t index, bool ro);
57
static void dtlb_pte_copy(pte_t *, index_t, bool);
58
static void itlb_pte_copy(pte_t *t, index_t index);
58
static void itlb_pte_copy(pte_t *, index_t);
59
static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
59
static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
60
    const char *str);
-
 
61
static void do_fast_data_access_mmu_miss_fault(istate_t *istate,
60
static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
62
    tlb_tag_access_reg_t tag, const char *str);
61
    const char *);
63
static void do_fast_data_access_protection_fault(istate_t *istate,
62
static void do_fast_data_access_protection_fault(istate_t *,
64
    tlb_tag_access_reg_t tag, const char *str);
63
    tlb_tag_access_reg_t, const char *);
65
 
64
 
66
char *context_encoding[] = {
65
char *context_encoding[] = {
67
    "Primary",
66
    "Primary",
68
    "Secondary",
67
    "Secondary",
69
    "Nucleus",
68
    "Nucleus",
Line 84... Line 83...
84
    itlb_sfsr_write(0);
83
    itlb_sfsr_write(0);
85
}
84
}
86
 
85
 
87
/** Insert privileged mapping into DMMU TLB.
86
/** Insert privileged mapping into DMMU TLB.
88
 *
87
 *
89
 * @param page Virtual page address.
88
 * @param page      Virtual page address.
90
 * @param frame Physical frame address.
89
 * @param frame     Physical frame address.
91
 * @param pagesize Page size.
90
 * @param pagesize  Page size.
92
 * @param locked True for permanent mappings, false otherwise.
91
 * @param locked    True for permanent mappings, false otherwise.
93
 * @param cacheable True if the mapping is cacheable, false otherwise.
92
 * @param cacheable True if the mapping is cacheable, false otherwise.
94
 */
93
 */
95
void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize,
94
void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize,
96
    bool locked, bool cacheable)
95
    bool locked, bool cacheable)
97
{
96
{
98
    tlb_tag_access_reg_t tag;
97
    tlb_tag_access_reg_t tag;
Line 101... Line 100...
101
    frame_address_t fr;
100
    frame_address_t fr;
102
 
101
 
103
    pg.address = page;
102
    pg.address = page;
104
    fr.address = frame;
103
    fr.address = frame;
105
 
104
 
106
    tag.value = ASID_KERNEL;
105
    tag.context = ASID_KERNEL;
107
    tag.vpn = pg.vpn;
106
    tag.vpn = pg.vpn;
108
 
107
 
109
    dtlb_tag_access_write(tag.value);
108
    dtlb_tag_access_write(tag.value);
110
 
109
 
111
    data.value = 0;
110
    data.value = 0;
Line 124... Line 123...
124
    dtlb_data_in_write(data.value);
123
    dtlb_data_in_write(data.value);
125
}
124
}
126
 
125
 
127
/** Copy PTE to TLB.
126
/** Copy PTE to TLB.
128
 *
127
 *
129
 * @param t     Page Table Entry to be copied.
128
 * @param t         Page Table Entry to be copied.
130
 * @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
129
 * @param index     Zero if lower 8K-subpage, one if higher 8K-subpage.
131
 * @param ro    If true, the entry will be created read-only, regardless of its
130
 * @param ro        If true, the entry will be created read-only, regardless
132
 *      w field.
131
 *          of its w field.
133
 */
132
 */
134
void dtlb_pte_copy(pte_t *t, index_t index, bool ro)
133
void dtlb_pte_copy(pte_t *t, index_t index, bool ro)
135
{
134
{
136
    tlb_tag_access_reg_t tag;
135
    tlb_tag_access_reg_t tag;
137
    tlb_data_t data;
136
    tlb_data_t data;
Line 163... Line 162...
163
    dtlb_data_in_write(data.value);
162
    dtlb_data_in_write(data.value);
164
}
163
}
165
 
164
 
166
/** Copy PTE to ITLB.
165
/** Copy PTE to ITLB.
167
 *
166
 *
168
 * @param t     Page Table Entry to be copied.
167
 * @param t     Page Table Entry to be copied.
169
 * @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
168
 * @param index     Zero if lower 8K-subpage, one if higher 8K-subpage.
170
 */
169
 */
171
void itlb_pte_copy(pte_t *t, index_t index)
170
void itlb_pte_copy(pte_t *t, index_t index)
172
{
171
{
173
    tlb_tag_access_reg_t tag;
172
    tlb_tag_access_reg_t tag;
174
    tlb_data_t data;
173
    tlb_data_t data;
Line 233... Line 232...
233
/** DTLB miss handler.
232
/** DTLB miss handler.
234
 *
233
 *
235
 * Note that some faults (e.g. kernel faults) were already resolved by the
234
 * Note that some faults (e.g. kernel faults) were already resolved by the
236
 * low-level, assembly language part of the fast_data_access_mmu_miss handler.
235
 * low-level, assembly language part of the fast_data_access_mmu_miss handler.
237
 *
236
 *
238
 * @param tag Content of the TLB Tag Access register as it existed when the
237
 * @param tag       Content of the TLB Tag Access register as it existed
239
 *    trap happened. This is to prevent confusion created by clobbered
238
 *          when the trap happened. This is to prevent confusion
240
 *    Tag Access register during a nested DTLB miss.
239
 *          created by clobbered Tag Access register during a nested
-
 
240
 *          DTLB miss.
241
 * @param istate Interrupted state saved on the stack.
241
 * @param istate    Interrupted state saved on the stack.
242
 */
242
 */
243
void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
243
void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
244
{
244
{
245
    uintptr_t va;
245
    uintptr_t va;
246
    index_t index;
246
    index_t index;
Line 285... Line 285...
285
    }
285
    }
286
}
286
}
287
 
287
 
288
/** DTLB protection fault handler.
288
/** DTLB protection fault handler.
289
 *
289
 *
290
 * @param tag Content of the TLB Tag Access register as it existed when the
290
 * @param tag       Content of the TLB Tag Access register as it existed
291
 *    trap happened. This is to prevent confusion created by clobbered
291
 *          when the trap happened. This is to prevent confusion
292
 *    Tag Access register during a nested DTLB miss.
292
 *          created by clobbered Tag Access register during a nested
-
 
293
 *          DTLB miss.
293
 * @param istate Interrupted state saved on the stack.
294
 * @param istate    Interrupted state saved on the stack.
294
 */
295
 */
295
void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
296
void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
296
{
297
{
297
    uintptr_t va;
298
    uintptr_t va;
298
    index_t index;
299
    index_t index;
Line 329... Line 330...
329
                __func__);
330
                __func__);
330
        }
331
        }
331
    }
332
    }
332
}
333
}
333
 
334
 
-
 
335
/** Print TLB entry (for debugging purposes).
-
 
336
 *
-
 
337
 * The diag field has been left out in order to make this function more generic
-
 
338
 * (there is no diag field in US3 architeture).
-
 
339
 *
-
 
340
 * @param i     TLB entry number
-
 
341
 * @param t     TLB entry tag
-
 
342
 * @param d     TLB entry data
-
 
343
 */
-
 
344
static void print_tlb_entry(int i, tlb_tag_read_reg_t t, tlb_data_t d)
-
 
345
{
-
 
346
    printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
-
 
347
        "ie=%d, soft2=%#x, pfn=%#x, soft=%#x, l=%d, "
-
 
348
        "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
-
 
349
        t.context, d.v, d.size, d.nfo, d.ie, d.soft2,
-
 
350
        d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
-
 
351
}
-
 
352
 
-
 
353
#if defined (US)
-
 
354
 
334
/** Print contents of both TLBs. */
355
/** Print contents of both TLBs. */
335
void tlb_print(void)
356
void tlb_print(void)
336
{
357
{
337
    int i;
358
    int i;
338
    tlb_data_t d;
359
    tlb_data_t d;
Line 340... Line 361...
340
   
361
   
341
    printf("I-TLB contents:\n");
362
    printf("I-TLB contents:\n");
342
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
363
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
343
        d.value = itlb_data_access_read(i);
364
        d.value = itlb_data_access_read(i);
344
        t.value = itlb_tag_read_read(i);
365
        t.value = itlb_tag_read_read(i);
345
 
-
 
346
        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
-
 
347
            "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
-
 
348
            "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
-
 
349
            t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
366
        print_tlb_entry(i, t, d);
350
            d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
-
 
351
    }
367
    }
352
 
368
 
353
    printf("D-TLB contents:\n");
369
    printf("D-TLB contents:\n");
354
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
370
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
355
        d.value = dtlb_data_access_read(i);
371
        d.value = dtlb_data_access_read(i);
356
        t.value = dtlb_tag_read_read(i);
372
        t.value = dtlb_tag_read_read(i);
357
       
-
 
358
        printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
-
 
359
            "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, "
-
 
360
            "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
-
 
361
            t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag,
373
        print_tlb_entry(i, t, d);
362
            d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
-
 
363
    }
374
    }
-
 
375
}
-
 
376
 
-
 
377
#elif defined (US3)
364
 
378
 
-
 
379
/** Print contents of all TLBs. */
-
 
380
void tlb_print(void)
-
 
381
{
-
 
382
    int i;
-
 
383
    tlb_data_t d;
-
 
384
    tlb_tag_read_reg_t t;
-
 
385
   
-
 
386
    printf("TLB_ISMALL contents:\n");
-
 
387
    for (i = 0; i < tlb_ismall_size(); i++) {
-
 
388
        d.value = dtlb_data_access_read(TLB_ISMALL, i);
-
 
389
        t.value = dtlb_tag_read_read(TLB_ISMALL, i);
-
 
390
        print_tlb_entry(i, t, d);
-
 
391
    }
-
 
392
   
-
 
393
    printf("TLB_IBIG contents:\n");
-
 
394
    for (i = 0; i < tlb_ibig_size(); i++) {
-
 
395
        d.value = dtlb_data_access_read(TLB_IBIG, i);
-
 
396
        t.value = dtlb_tag_read_read(TLB_IBIG, i);
-
 
397
        print_tlb_entry(i, t, d);
-
 
398
    }
-
 
399
   
-
 
400
    printf("TLB_DSMALL contents:\n");
-
 
401
    for (i = 0; i < tlb_dsmall_size(); i++) {
-
 
402
        d.value = dtlb_data_access_read(TLB_DSMALL, i);
-
 
403
        t.value = dtlb_tag_read_read(TLB_DSMALL, i);
-
 
404
        print_tlb_entry(i, t, d);
-
 
405
    }
-
 
406
   
-
 
407
    printf("TLB_DBIG_1 contents:\n");
-
 
408
    for (i = 0; i < tlb_dbig_size(); i++) {
-
 
409
        d.value = dtlb_data_access_read(TLB_DBIG_0, i);
-
 
410
        t.value = dtlb_tag_read_read(TLB_DBIG_0, i);
-
 
411
        print_tlb_entry(i, t, d);
-
 
412
    }
-
 
413
   
-
 
414
    printf("TLB_DBIG_2 contents:\n");
-
 
415
    for (i = 0; i < tlb_dbig_size(); i++) {
-
 
416
        d.value = dtlb_data_access_read(TLB_DBIG_1, i);
-
 
417
        t.value = dtlb_tag_read_read(TLB_DBIG_1, i);
-
 
418
        print_tlb_entry(i, t, d);
-
 
419
    }
365
}
420
}
366
 
421
 
-
 
422
#endif
-
 
423
 
367
void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
424
void do_fast_instruction_access_mmu_miss_fault(istate_t *istate,
368
    const char *str)
425
    const char *str)
369
{
426
{
370
    fault_if_from_uspace(istate, "%s\n", str);
427
    fault_if_from_uspace(istate, "%s\n", str);
371
    dump_istate(istate);
428
    dump_istate(istate);
Line 409... Line 466...
409
    uintptr_t sfar;
466
    uintptr_t sfar;
410
 
467
 
411
    sfsr.value = dtlb_sfsr_read();
468
    sfsr.value = dtlb_sfsr_read();
412
    sfar = dtlb_sfar_read();
469
    sfar = dtlb_sfar_read();
413
   
470
   
-
 
471
#if defined (US)
414
    printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
472
    printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
415
        "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
473
        "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
416
        sfsr.ow, sfsr.fv);
474
        sfsr.ow, sfsr.fv);
-
 
475
#elif defined (US3)
-
 
476
    printf("DTLB SFSR: nf=%d, asi=%#x, tm=%d, ft=%#x, e=%d, ct=%d, pr=%d, "
-
 
477
        "w=%d, ow=%d, fv=%d\n", sfsr.nf, sfsr.asi, sfsr.tm, sfsr.ft,
-
 
478
        sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
-
 
479
#endif
-
 
480
       
417
    printf("DTLB SFAR: address=%p\n", sfar);
481
    printf("DTLB SFAR: address=%p\n", sfar);
418
   
482
   
419
    dtlb_sfsr_write(0);
483
    dtlb_sfsr_write(0);
420
}
484
}
421
 
485
 
-
 
486
#if defined (US3)
422
/** Invalidate all unlocked ITLB and DTLB entries. */
487
/** Invalidates given TLB entry if and only if it is non-locked or global.
-
 
488
 *
-
 
489
 * @param tlb       TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1,
-
 
490
 *          TLB_ISMALL, TLB_IBIG).
-
 
491
 * @param entry     Entry index within the given TLB.
-
 
492
 */
423
void tlb_invalidate_all(void)
493
static void tlb_invalidate_entry(int tlb, index_t entry)
424
{
494
{
425
    int i;
-
 
426
    tlb_data_t d;
495
    tlb_data_t d;
427
    tlb_tag_read_reg_t t;
496
    tlb_tag_read_reg_t t;
-
 
497
   
-
 
498
    if (tlb == TLB_DSMALL || tlb == TLB_DBIG_0 || tlb == TLB_DBIG_1) {
-
 
499
        d.value = dtlb_data_access_read(tlb, entry);
-
 
500
        if (!d.l || d.g) {
-
 
501
            t.value = dtlb_tag_read_read(tlb, entry);
-
 
502
            d.v = false;
-
 
503
            dtlb_tag_access_write(t.value);
-
 
504
            dtlb_data_access_write(tlb, entry, d.value);
-
 
505
        }
-
 
506
    } else if (tlb == TLB_ISMALL || tlb == TLB_IBIG) {
-
 
507
        d.value = itlb_data_access_read(tlb, entry);
-
 
508
        if (!d.l || d.g) {
-
 
509
            t.value = itlb_tag_read_read(tlb, entry);
-
 
510
            d.v = false;
-
 
511
            itlb_tag_access_write(t.value);
-
 
512
            itlb_data_access_write(tlb, entry, d.value);
-
 
513
        }
-
 
514
    }
-
 
515
}
-
 
516
#endif
428
 
517
 
-
 
518
/** Invalidate all unlocked ITLB and DTLB entries. */
-
 
519
void tlb_invalidate_all(void)
-
 
520
{
-
 
521
    int i;
-
 
522
   
429
    /*
523
    /*
430
     * Walk all ITLB and DTLB entries and remove all unlocked mappings.
524
     * Walk all ITLB and DTLB entries and remove all unlocked mappings.
431
     *
525
     *
432
     * The kernel doesn't use global mappings so any locked global mappings
526
     * The kernel doesn't use global mappings so any locked global mappings
433
     * found  must have been created by someone else. Their only purpose now
527
     * found must have been created by someone else. Their only purpose now
434
     * is to collide with proper mappings. Invalidate immediately. It should
528
     * is to collide with proper mappings. Invalidate immediately. It should
435
     * be safe to invalidate them as late as now.
529
     * be safe to invalidate them as late as now.
436
     */
530
     */
437
 
531
 
-
 
532
#if defined (US)
-
 
533
    tlb_data_t d;
-
 
534
    tlb_tag_read_reg_t t;
-
 
535
 
438
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
536
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
439
        d.value = itlb_data_access_read(i);
537
        d.value = itlb_data_access_read(i);
440
        if (!d.l || d.g) {
538
        if (!d.l || d.g) {
441
            t.value = itlb_tag_read_read(i);
539
            t.value = itlb_tag_read_read(i);
442
            d.v = false;
540
            d.v = false;
443
            itlb_tag_access_write(t.value);
541
            itlb_tag_access_write(t.value);
444
            itlb_data_access_write(i, d.value);
542
            itlb_data_access_write(i, d.value);
445
        }
543
        }
446
    }
544
    }
447
   
545
 
448
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
546
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
449
        d.value = dtlb_data_access_read(i);
547
        d.value = dtlb_data_access_read(i);
450
        if (!d.l || d.g) {
548
        if (!d.l || d.g) {
451
            t.value = dtlb_tag_read_read(i);
549
            t.value = dtlb_tag_read_read(i);
452
            d.v = false;
550
            d.v = false;
453
            dtlb_tag_access_write(t.value);
551
            dtlb_tag_access_write(t.value);
454
            dtlb_data_access_write(i, d.value);
552
            dtlb_data_access_write(i, d.value);
455
        }
553
        }
456
    }
554
    }
-
 
555
 
-
 
556
#elif defined (US3)
457
   
557
 
-
 
558
    for (i = 0; i < tlb_ismall_size(); i++)
-
 
559
        tlb_invalidate_entry(TLB_ISMALL, i);
-
 
560
    for (i = 0; i < tlb_ibig_size(); i++)
-
 
561
        tlb_invalidate_entry(TLB_IBIG, i);
-
 
562
    for (i = 0; i < tlb_dsmall_size(); i++)
-
 
563
        tlb_invalidate_entry(TLB_DSMALL, i);
-
 
564
    for (i = 0; i < tlb_dbig_size(); i++)
-
 
565
        tlb_invalidate_entry(TLB_DBIG_0, i);
-
 
566
    for (i = 0; i < tlb_dbig_size(); i++)
-
 
567
        tlb_invalidate_entry(TLB_DBIG_1, i);
-
 
568
#endif
-
 
569
 
458
}
570
}
459
 
571
 
460
/** Invalidate all ITLB and DTLB entries that belong to specified ASID
572
/** Invalidate all ITLB and DTLB entries that belong to specified ASID
461
 * (Context).
573
 * (Context).
462
 *
574
 *
Line 482... Line 594...
482
}
594
}
483
 
595
 
484
/** Invalidate all ITLB and DTLB entries for specified page range in specified
596
/** Invalidate all ITLB and DTLB entries for specified page range in specified
485
 * address space.
597
 * address space.
486
 *
598
 *
487
 * @param asid Address Space ID.
599
 * @param asid      Address Space ID.
488
 * @param page First page which to sweep out from ITLB and DTLB.
600
 * @param page      First page which to sweep out from ITLB and DTLB.
489
 * @param cnt Number of ITLB and DTLB entries to invalidate.
601
 * @param cnt       Number of ITLB and DTLB entries to invalidate.
490
 */
602
 */
491
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
603
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
492
{
604
{
493
    unsigned int i;
605
    unsigned int i;
494
    tlb_context_reg_t pc_save, ctx;
606
    tlb_context_reg_t pc_save, ctx;