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46 | __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
46 | __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
47 | 47 | ||
48 | return v; |
48 | return v; |
49 | } |
49 | } |
50 | 50 | ||
- | 51 | /** Read IVA (Interruption Vector Address). |
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- | 52 | * |
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- | 53 | * @return Return location of interruption vector table. |
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- | 54 | */ |
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- | 55 | static inline __u64 iva_read(void) |
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- | 56 | { |
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- | 57 | __u64 v; |
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- | 58 | ||
- | 59 | __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v)); |
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- | 60 | ||
- | 61 | return v; |
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- | 62 | } |
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- | 63 | ||
- | 64 | /** Write IVA (Interruption Vector Address) register. |
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- | 65 | * |
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- | 66 | * @param New location of interruption vector table. |
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- | 67 | */ |
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- | 68 | static inline void iva_write(__u64 v) |
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- | 69 | { |
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- | 70 | __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v)); |
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- | 71 | } |
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- | 72 | ||
- | 73 | ||
51 | /** Read IVR (External Interrupt Vector Register). |
74 | /** Read IVR (External Interrupt Vector Register). |
52 | * |
75 | * |
53 | * @return Highest priority, pending, unmasked external interrupt vector. |
76 | * @return Highest priority, pending, unmasked external interrupt vector. |
54 | */ |
77 | */ |
55 | static inline __u64 ivr_read(void) |
78 | static inline __u64 ivr_read(void) |
Line 216... | Line 239... | ||
216 | __asm__ volatile ("mov %0 = psr\n" : "=r" (v)); |
239 | __asm__ volatile ("mov %0 = psr\n" : "=r" (v)); |
217 | 240 | ||
218 | return (ipl_t) v; |
241 | return (ipl_t) v; |
219 | } |
242 | } |
220 | 243 | ||
221 | #define set_shadow_register(reg,val) {__u64 v = val; __asm__ volatile("mov r15 = %0;;\n""bsw.0;;\n""mov " #reg " = r15;;\n""bsw.1;;\n" : : "r" (v) : "r15" ); } |
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222 | #define get_shadow_register(reg,val) {__u64 v ; __asm__ volatile("bsw.0;;\n" "mov r15 = r" #reg ";;\n" "bsw.1;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } |
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223 | - | ||
224 | #define get_control_register(reg,val) {__u64 v ; __asm__ volatile("mov r15 = cr" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } |
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225 | #define get_aplication_register(reg,val) {__u64 v ; __asm__ volatile("mov r15 = ar" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } |
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226 | #define get_psr(val) {__u64 v ; __asm__ volatile("mov r15 = psr;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } |
- | |
227 | - | ||
228 | extern void cpu_halt(void); |
244 | extern void cpu_halt(void); |
229 | extern void cpu_sleep(void); |
245 | extern void cpu_sleep(void); |
230 | extern void asm_delay_loop(__u32 t); |
246 | extern void asm_delay_loop(__u32 t); |
231 | 247 | ||
232 | #endif |
248 | #endif |