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} cpu_arch_t;
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} cpu_arch_t;
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#define CR4_OSFXSR_MASK (1<<9)
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#define CR4_OSFXSR_MASK (1<<9)
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-
 
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#define DR6_BT (1<<15)
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#define DR6_BS (1<<14)
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#define DR6_BD (1<<13)
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */