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38 | #include <arch/memstr.h> |
38 | #include <arch/memstr.h> |
39 | #include <arch/regutils.h> |
39 | #include <arch/regutils.h> |
40 | #include <interrupt.h> |
40 | #include <interrupt.h> |
41 | #include <arch/drivers/gxemul.h> |
41 | #include <arch/drivers/gxemul.h> |
42 | #include <arch/mm/page_fault.h> |
42 | #include <arch/mm/page_fault.h> |
- | 43 | #include <print.h> |
|
43 | 44 | ||
44 | #define PREFETCH_OFFSET 0x8 |
45 | #define PREFETCH_OFFSET 0x8 |
45 | #define BRANCH_OPCODE 0xea000000 |
46 | #define BRANCH_OPCODE 0xea000000 |
46 | #define LDR_OPCODE 0xe59ff000 |
47 | #define LDR_OPCODE 0xe59ff000 |
47 | #define VALID_BRANCH_MASK 0xff000000 |
48 | #define VALID_BRANCH_MASK 0xff000000 |
48 | #define EXC_VECTORS_SIZE 0x20 |
49 | #define EXC_VECTORS_SIZE 0x20 |
49 | #define EXC_VECTORS 0x8 |
50 | #define EXC_VECTORS 0x8 |
50 | 51 | ||
- | 52 | extern uintptr_t supervisor_sp; |
|
- | 53 | extern uintptr_t exc_stack; |
|
- | 54 | ||
- | 55 | inline static void setup_stack_and_save_regs() |
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- | 56 | { |
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- | 57 | asm volatile( "ldr r13, =exc_stack \n\ |
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- | 58 | stmfd r13!, {r0} \n\ |
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- | 59 | mrs r0, spsr \n\ |
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- | 60 | and r0, r0, #0x1f \n\ |
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- | 61 | cmp r0, #0x10 \n\ |
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- | 62 | bne 1f \n\ |
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- | 63 | \n\ |
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- | 64 | @prev mode was usermode \n\ |
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- | 65 | ldmfd r13!, {r0} \n\ |
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- | 66 | ldr r13, =supervisor_sp \n\ |
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- | 67 | stmfd r13!, {r0-r12, r13, lr} \n\ |
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- | 68 | stmfd r13!, {r13, lr}^ \n\ |
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- | 69 | mrs r0, spsr \n\ |
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- | 70 | stmfd r13!, {r0} \n\ |
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- | 71 | b 2f \n\ |
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- | 72 | \n\ |
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- | 73 | @prev mode was not usermode \n\ |
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- | 74 | 1: \n\ |
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- | 75 | stmfd r13!, {r1, r2, r3} \n\ |
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- | 76 | mrs r1, cpsr \n\ |
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- | 77 | mov r2, lr \n\ |
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- | 78 | bic r1, r1, #0x1f \n\ |
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- | 79 | orr r1, r1, r0 \n\ |
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- | 80 | mrs r0, cpsr \n\ |
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- | 81 | msr cpsr_c, r1 \n\ |
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- | 82 | \n\ |
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- | 83 | mov r3, r13 \n\ |
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- | 84 | stmfd r13!, {r2} \n\ |
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- | 85 | stmfd r13!, {r3} \n\ |
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- | 86 | stmfd r13!, {r4-r12} \n\ |
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- | 87 | mov r2, lr \n\ |
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- | 88 | mov r1, r13 \n\ |
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- | 89 | msr cpsr_c, r0 \n\ |
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- | 90 | \n\ |
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- | 91 | ldmfd r13!, {r4, r5, r6, r7} \n\ |
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- | 92 | stmfd r1!, {r4, r5, r6} \n\ |
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- | 93 | stmfd r1!, {r7} \n\ |
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- | 94 | stmfd r1!, {r2} \n\ |
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- | 95 | stmfd r1!, {r3} \n\ |
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- | 96 | mrs r0, spsr \n\ |
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- | 97 | stmfd r1!, {r0} \n\ |
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- | 98 | mov r13, r1 \n\ |
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- | 99 | 2:" |
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- | 100 | ); |
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- | 101 | } |
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- | 102 | ||
- | 103 | ||
- | 104 | inline static void load_regs() |
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- | 105 | { |
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- | 106 | asm volatile( "ldmfd r13!, {r0} \n\ |
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- | 107 | msr spsr, r0 \n\ |
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- | 108 | and r0, r0, #0x1f \n\ |
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- | 109 | cmp r0, #0x10 \n\ |
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- | 110 | bne 3f \n\ |
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- | 111 | \n\ |
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- | 112 | @return to user mode \n\ |
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- | 113 | ldmfd r13!, {r13, lr}^ \n\ |
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- | 114 | b 4f \n\ |
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- | 115 | \n\ |
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- | 116 | @return to non-user mode \n\ |
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- | 117 | 3: \n\ |
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- | 118 | ldmfd r13!, {r1, r2} \n\ |
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- | 119 | mrs r3, cpsr \n\ |
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- | 120 | bic r3, r3, #0x1f \n\ |
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- | 121 | orr r3, r3, r0 \n\ |
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- | 122 | mrs r0, cpsr \n\ |
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- | 123 | msr cpsr_c, r3 \n\ |
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- | 124 | \n\ |
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- | 125 | mov r13, r1 \n\ |
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- | 126 | mov lr, r2 \n\ |
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- | 127 | msr cpsr_c, r0 \n\ |
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- | 128 | \n\ |
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- | 129 | @actual return \n\ |
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- | 130 | 4: \n\ |
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- | 131 | ldmfd r13!, {r0-r12, r13, pc}^" |
|
- | 132 | ); |
|
- | 133 | } |
|
- | 134 | ||
51 | 135 | ||
52 | #define SAVE_REGS_TO_STACK \ |
136 | #define SAVE_REGS_TO_STACK \ |
53 | asm("stmfd sp!, {r0-r12, sp, lr}"); \ |
137 | asm("stmfd r13!, {r0-r12, r13, lr}"); \ |
54 | asm("mrs r14, spsr"); \ |
138 | asm("mrs r14, spsr"); \ |
55 | asm("stmfd sp!, {r14}"); |
139 | asm("stmfd r13!, {r14}"); |
- | 140 | ||
- | 141 | ||
56 | 142 | ||
57 | #define CALL_EXC_DISPATCH(exception) \ |
143 | #define CALL_EXC_DISPATCH(exception) \ |
58 | asm("mov r0, %0" : : "i" (exception)); \ |
144 | asm("mov r0, %0" : : "i" (exception)); \ |
59 | asm("mov r1, sp"); \ |
145 | asm("mov r1, r13"); \ |
60 | asm("bl exc_dispatch"); |
146 | asm("bl exc_dispatch"); |
61 | 147 | ||
- | 148 | ||
62 | /**Loads registers from the stack and resets SPSR before exitting exception |
149 | /**Loads registers from the stack and resets SPSR before exitting exception |
63 | * handler. |
150 | * handler. |
64 | */ |
151 | */ |
65 | #define LOAD_REGS_FROM_STACK \ |
152 | #define LOAD_REGS_FROM_STACK \ |
66 | asm("ldmfd sp!, {r14}"); \ |
153 | asm("ldmfd r13!, {r14}"); \ |
67 | asm("msr spsr, r14"); \ |
154 | asm("msr spsr, r14"); \ |
68 | asm("ldmfd sp!, {r0-r12, sp, pc}^"); |
155 | asm("ldmfd r13!, {r0-r12, r13, pc}^"); |
- | 156 | ||
- | 157 | ||
69 | 158 | ||
70 | /** General exception handler. |
159 | /** General exception handler. |
71 | * Stores registers, dispatches the exception, |
160 | * Stores registers, dispatches the exception, |
72 | * and finally restores registers and returns from exception processing. |
161 | * and finally restores registers and returns from exception processing. |
73 | */ |
162 | */ |
- | 163 | ||
74 | #define PROCESS_EXCEPTION(exception) \ |
164 | #define PROCESS_EXCEPTION(exception) \ |
75 | SAVE_REGS_TO_STACK \ |
165 | setup_stack_and_save_regs(); \ |
76 | CALL_EXC_DISPATCH(exception) \ |
166 | CALL_EXC_DISPATCH(exception) \ |
- | 167 | load_regs(); |
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- | 168 | ||
- | 169 | /* #define PROCESS_EXCEPTION(exception) \ |
|
- | 170 | SAVE_REGS_TO_STACK \ |
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- | 171 | CALL_EXC_DISPATCH(exception) \ |
|
77 | LOAD_REGS_FROM_STACK |
172 | LOAD_REGS_FROM_STACK*/ |
78 | 173 | ||
79 | /** Updates specified exception vector to jump to given handler. |
174 | /** Updates specified exception vector to jump to given handler. |
80 | * Addresses of handlers are stored in memory following exception vectors. |
175 | * Addresses of handlers are stored in memory following exception vectors. |
81 | */ |
176 | */ |
82 | static void install_handler (unsigned handler_addr, unsigned* vector) |
177 | static void install_handler (unsigned handler_addr, unsigned* vector) |
Line 89... | Line 184... | ||
89 | /* make it LDR instruction and store at exception vector */ |
184 | /* make it LDR instruction and store at exception vector */ |
90 | *vector = handler_address_ptr | LDR_OPCODE; |
185 | *vector = handler_address_ptr | LDR_OPCODE; |
91 | 186 | ||
92 | /* store handler's address */ |
187 | /* store handler's address */ |
93 | *(vector + EXC_VECTORS) = handler_addr; |
188 | *(vector + EXC_VECTORS) = handler_addr; |
- | 189 | ||
94 | } |
190 | } |
95 | 191 | ||
- | 192 | ||
96 | static void reset_exception_entry() |
193 | static void reset_exception_entry() |
97 | { |
194 | { |
98 | PROCESS_EXCEPTION(EXC_RESET); |
195 | PROCESS_EXCEPTION(EXC_RESET); |
99 | } |
196 | } |
100 | 197 | ||
Line 133... | Line 230... | ||
133 | 230 | ||
134 | /** Low-level Interrupt Exception handler */ |
231 | /** Low-level Interrupt Exception handler */ |
135 | static void irq_exception_entry() |
232 | static void irq_exception_entry() |
136 | { |
233 | { |
137 | asm("sub lr, lr, #4"); |
234 | asm("sub lr, lr, #4"); |
- | 235 | // SAVE_REGS_TO_STACK |
|
- | 236 | // CALL_EXC_DISPATCH(EXC_IRQ) |
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- | 237 | // LOAD_REGS_FROM_STACK; |
|
138 | PROCESS_EXCEPTION(EXC_IRQ); |
238 | PROCESS_EXCEPTION(EXC_IRQ); |
139 | } |
239 | } |
140 | 240 | ||
- | 241 | // static void prefetch_abort_exception(int exc_no, istate_t* istate) |
|
- | 242 | // { |
|
- | 243 | // dputs("(PREFETCH|DATA) ABORT exception caught, not processed.\n"); |
|
- | 244 | // } |
|
- | 245 | ||
- | 246 | static void swi_exception(int exc_no, istate_t* istate) |
|
- | 247 | { |
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- | 248 | dprintf("\nIstate dump:\n"); |
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- | 249 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
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- | 250 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
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- | 251 | dprintf(" r8:%X r9:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
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- | 252 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
|
- | 253 | dprintf(" prev_lr:%X prev_sp:%X\n", istate->prev_lr, istate->prev_sp); |
|
- | 254 | } |
|
141 | 255 | ||
142 | /** Interrupt Exception handler. |
256 | /** Interrupt Exception handler. |
143 | * Determines the sources of interrupt, and calls their handlers. |
257 | * Determines the sources of interrupt, and calls their handlers. |
144 | */ |
258 | */ |
145 | static void irq_exception(int exc_no, istate_t* istate) |
259 | static void irq_exception(int exc_no, istate_t* istate) |
Line 204... | Line 318... | ||
204 | (unsigned*)EXC_PREFETCH_ABORT_VEC); |
318 | (unsigned*)EXC_PREFETCH_ABORT_VEC); |
205 | 319 | ||
206 | install_handler((unsigned)data_abort_exception_entry, |
320 | install_handler((unsigned)data_abort_exception_entry, |
207 | (unsigned*)EXC_DATA_ABORT_VEC); |
321 | (unsigned*)EXC_DATA_ABORT_VEC); |
208 | 322 | ||
209 | install_handler((unsigned)irq_exception_entry, |
323 | install_handler((unsigned)irq_exception_entry, |
210 | (unsigned*)EXC_IRQ_VEC); |
324 | (unsigned*)EXC_IRQ_VEC); |
211 | 325 | ||
212 | install_handler((unsigned)fiq_exception_entry, |
326 | install_handler((unsigned)fiq_exception_entry, |
213 | (unsigned*)EXC_FIQ_VEC); |
327 | (unsigned*)EXC_FIQ_VEC); |
214 | } |
328 | } |
215 | 329 | ||
- | 330 | #ifdef HIGH_EXCEPTION_VECTORS |
|
216 | /** Activates using high exception vectors addresses. */ |
331 | /** Activates using high exception vectors addresses. */ |
217 | static void high_vectors() |
332 | static void high_vectors() |
218 | { |
333 | { |
219 | uint32_t control_reg; |
334 | uint32_t control_reg; |
220 | 335 | ||
Line 223... | Line 338... | ||
223 | //switch on the high vectors bit |
338 | //switch on the high vectors bit |
224 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
339 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
225 | 340 | ||
226 | asm volatile( "mcr p15, 0, %0, c1, c1" : : "r" (control_reg)); |
341 | asm volatile( "mcr p15, 0, %0, c1, c1" : : "r" (control_reg)); |
227 | } |
342 | } |
228 | 343 | #endif |
|
229 | 344 | ||
230 | /** Initializes exception handling. |
345 | /** Initializes exception handling. |
231 | * |
346 | * |
232 | * Installs low-level exception handlers and then registers |
347 | * Installs low-level exception handlers and then registers |
233 | * exceptions and their handlers to kernel exception dispatcher. |
348 | * exceptions and their handlers to kernel exception dispatcher. |
Line 235... | Line 350... | ||
235 | void exception_init(void) |
350 | void exception_init(void) |
236 | { |
351 | { |
237 | #ifdef HIGH_EXCEPTION_VECTORS |
352 | #ifdef HIGH_EXCEPTION_VECTORS |
238 | high_vectors(); |
353 | high_vectors(); |
239 | #endif |
354 | #endif |
240 | - | ||
241 | install_exception_handlers(); |
355 | install_exception_handlers(); |
242 | 356 | ||
243 | exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception); |
357 | exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception); |
244 | exc_register(EXC_PREFETCH_ABORT, "prefetch abort", (iroutine) prefetch_abort); |
358 | exc_register(EXC_PREFETCH_ABORT, "prefetch abort", (iroutine) prefetch_abort); |
245 | exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort); |
359 | exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort); |
- | 360 | exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception); |
|
246 | /* TODO add next */ |
361 | /* TODO add next */ |
247 | } |
362 | } |
248 | 363 | ||
249 | /* TODO change soon, temporary hack. */ |
364 | /** Sets stack pointers in all supported exception modes. |
- | 365 | * |
|
- | 366 | * @param stack_ptr stack pointer |
|
- | 367 | */ |
|
250 | void setup_exception_stacks() |
368 | void setup_exception_stacks() |
251 | { |
369 | { |
252 | /* switch to particular mode and set "sp" there */ |
370 | /* switch to particular mode and set "r13" there */ |
253 | 371 | ||
254 | uint32_t cspr = current_status_reg_read(); |
372 | uint32_t cspr = current_status_reg_read(); |
255 | 373 | ||
256 | /* IRQ stack */ |
374 | /* IRQ stack */ |
257 | current_status_reg_control_write( |
375 | current_status_reg_control_write( |
258 | (cspr & ~STATUS_REG_MODE_MASK) | IRQ_MODE |
376 | (cspr & ~STATUS_REG_MODE_MASK) | IRQ_MODE |
259 | ); |
377 | ); |
260 | asm("ldr sp, =irq_stack"); |
378 | asm("ldr r13, =exc_stack"); |
261 | 379 | ||
262 | /* abort stack */ |
380 | /* abort stack */ |
263 | current_status_reg_control_write( |
381 | current_status_reg_control_write( |
264 | (cspr & ~STATUS_REG_MODE_MASK) | ABORT_MODE |
382 | (cspr & ~STATUS_REG_MODE_MASK) | ABORT_MODE |
265 | ); |
383 | ); |
266 | asm("ldr sp, =abort_stack"); |
384 | asm("ldr r13, =exc_stack"); |
267 | 385 | ||
268 | /* TODO if you want to test other exceptions than IRQ, |
386 | /* TODO if you want to test other exceptions than IRQ, |
269 | make stack analogous to irq_stack (in start.S), |
387 | make stack analogous to irq_stack (in start.S), |
270 | and then set stack pointer here */ |
388 | and then set stack pointer here */ |
271 | 389 | ||
272 | current_status_reg_control_write( cspr); |
390 | current_status_reg_control_write( cspr); |
273 | 391 | ||
274 | } |
392 | } |
275 | 393 | ||
276 | /** @} |
394 | /** @} |
277 | */ |
395 | */ |