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43 | /** |
43 | /** |
44 | * i8042 processor driver. |
44 | * i8042 processor driver. |
45 | * It takes care of low-level keyboard functions. |
45 | * It takes care of low-level keyboard functions. |
46 | */ |
46 | */ |
47 | 47 | ||
48 | #define i8042_DATA 0x60 |
48 | #define i8042_DATA 0x60 |
49 | #define i8042_STATUS 0x64 |
49 | #define i8042_STATUS 0x64 |
50 | #define i8042_BUFFER_FULL_MASK 0x01 |
50 | #define i8042_BUFFER_FULL_MASK 0x01 |
51 | 51 | ||
52 | - | ||
53 | /** Keyboard commands. */ |
52 | /** Keyboard commands. */ |
54 | #define KBD_ENABLE 0xf4 |
53 | #define KBD_ENABLE 0xf4 |
55 | #define KBD_DISABLE 0xf5 |
54 | #define KBD_DISABLE 0xf5 |
56 | #define KBD_ACK 0xfa |
55 | #define KBD_ACK 0xfa |
57 | 56 | ||
58 | /* |
57 | /* |
59 | 60 Write 8042 Command Byte: next data byte written to port 60h is |
58 | * 60 Write 8042 Command Byte: next data byte written to port 60h is |
60 | placed in 8042 command register.Format: |
59 | * placed in 8042 command register.Format: |
61 | 60 | * |
|
62 | |7|6|5|4|3|2|1|0|8042 Command Byte |
61 | * |7|6|5|4|3|2|1|0|8042 Command Byte |
63 | | | | | | | | `---- 1=enable output register full interrupt |
62 | * | | | | | | | `---- 1=enable output register full interrupt |
64 | | | | | | | `----- should be 0 |
63 | * | | | | | | `----- should be 0 |
65 | | | | | | `------ 1=set status register system, 0=clear |
64 | * | | | | | `------ 1=set status register system, 0=clear |
66 | | | | | `------- 1=override keyboard inhibit, 0=allow inhibit |
65 | * | | | | `------- 1=override keyboard inhibit, 0=allow inhibit |
67 | | | | `-------- disable keyboard I/O by driving clock line low |
66 | * | | | `-------- disable keyboard I/O by driving clock line low |
68 | | | `--------- disable auxiliary device, drives clock line low |
67 | * | | `--------- disable auxiliary device, drives clock line low |
69 | | `---------- IBM scancode translation 0=AT, 1=PC/XT |
68 | * | `---------- IBM scancode translation 0=AT, 1=PC/XT |
70 | `----------- reserved, should be 0 |
69 | * `----------- reserved, should be 0 |
71 | */ |
70 | */ |
72 | - | ||
73 | #define i8042_SET_COMMAND 0x60 |
- | |
74 | #define i8042_COMMAND 0x49 |
- | |
75 | #define i8042_WAIT_MASK 0x02 |
- | |
76 | 71 | ||
- | 72 | #define i8042_SET_COMMAND 0x60 |
|
- | 73 | #define i8042_COMMAND 0x49 |
|
- | 74 | #define i8042_WAIT_MASK 0x02 |
|
77 | 75 | ||
78 | #define SPECIAL '?' |
76 | #define SPECIAL '?' |
79 | #define KEY_RELEASE 0x80 |
77 | #define KEY_RELEASE 0x80 |
80 | 78 | ||
81 | static void key_released(__u8 sc); |
79 | static void key_released(__u8 sc); |
Line 86... | Line 84... | ||
86 | #define PRESSED_CAPSLOCK (1<<1) |
84 | #define PRESSED_CAPSLOCK (1<<1) |
87 | #define LOCKED_CAPSLOCK (1<<0) |
85 | #define LOCKED_CAPSLOCK (1<<0) |
88 | 86 | ||
89 | #define ACTIVE_READ_BUFF_SIZE 16 /*Must be power of 2*/ |
87 | #define ACTIVE_READ_BUFF_SIZE 16 /*Must be power of 2*/ |
90 | 88 | ||
91 | - | ||
92 | __u8 active_read_buff[ACTIVE_READ_BUFF_SIZE]={0}; |
89 | __u8 active_read_buff[ACTIVE_READ_BUFF_SIZE]={0}; |
93 | 90 | ||
94 | SPINLOCK_INITIALIZE(keylock); /**< keylock protects keyflags and lockflags. */ |
91 | SPINLOCK_INITIALIZE(keylock); /**< keylock protects keyflags and lockflags. */ |
95 | static volatile int keyflags; /**< Tracking of multiple keypresses. */ |
92 | static volatile int keyflags; /**< Tracking of multiple keypresses. */ |
96 | static volatile int lockflags; /**< Tracking of multiple keys lockings. */ |
93 | static volatile int lockflags; /**< Tracking of multiple keys lockings. */ |
Line 269... | Line 266... | ||
269 | 266 | ||
270 | /** Initialize i8042. */ |
267 | /** Initialize i8042. */ |
271 | void i8042_init(void) |
268 | void i8042_init(void) |
272 | { |
269 | { |
273 | exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); |
270 | exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); |
274 | while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ |
271 | while (inb(i8042_STATUS)&i8042_WAIT_MASK) { |
- | 272 | /* wait */ |
|
- | 273 | } |
|
275 | outb(i8042_STATUS,i8042_SET_COMMAND); |
274 | outb(i8042_STATUS,i8042_SET_COMMAND); |
276 | while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ |
275 | while (inb(i8042_STATUS)&i8042_WAIT_MASK) { |
- | 276 | /* wait */ |
|
- | 277 | } |
|
277 | outb(i8042_DATA,i8042_COMMAND); |
278 | outb(i8042_DATA,i8042_COMMAND); |
278 | 279 | ||
279 | trap_virtual_enable_irqs(1<<IRQ_KBD); |
280 | trap_virtual_enable_irqs(1<<IRQ_KBD); |
280 | chardev_initialize("i8042_kbd", &kbrd, &ops); |
281 | chardev_initialize("i8042_kbd", &kbrd, &ops); |
281 | stdin = &kbrd; |
282 | stdin = &kbrd; |
Line 403... | Line 404... | ||
403 | /* Called from getc(). */ |
404 | /* Called from getc(). */ |
404 | void i8042_suspend(chardev_t *d) |
405 | void i8042_suspend(chardev_t *d) |
405 | { |
406 | { |
406 | } |
407 | } |
407 | 408 | ||
408 | - | ||
409 | static __u8 active_read_buff_read(void) |
409 | static __u8 active_read_buff_read(void) |
410 | { |
410 | { |
411 | static int i=0; |
411 | static int i=0; |
412 | i&=(ACTIVE_READ_BUFF_SIZE-1); |
412 | i&=(ACTIVE_READ_BUFF_SIZE-1); |
413 | if(!active_read_buff[i]) |
413 | if(!active_read_buff[i]) |
Line 425... | Line 425... | ||
425 | i&=(ACTIVE_READ_BUFF_SIZE-1); |
425 | i&=(ACTIVE_READ_BUFF_SIZE-1); |
426 | active_read_buff[i]=0; |
426 | active_read_buff[i]=0; |
427 | } |
427 | } |
428 | 428 | ||
429 | 429 | ||
430 | static void active_readed_key_pressed(__u8 sc) |
430 | static void active_read_key_pressed(__u8 sc) |
431 | { |
431 | { |
432 | char *map = sc_primary_map; |
432 | char *map = sc_primary_map; |
433 | char ascii = sc_primary_map[sc]; |
433 | char ascii = sc_primary_map[sc]; |
434 | bool shift, capslock; |
434 | bool shift, capslock; |
435 | bool letter = false; |
435 | bool letter = false; |
Line 494... | Line 494... | ||
494 | } |
494 | } |
495 | /*spinlock_unlock(&keylock);*/ |
495 | /*spinlock_unlock(&keylock);*/ |
496 | 496 | ||
497 | } |
497 | } |
498 | 498 | ||
499 | - | ||
500 | static char key_read(chardev_t *d) |
499 | static char key_read(chardev_t *d) |
501 | { |
500 | { |
502 | char ch; |
501 | char ch; |
503 | - | ||
504 | 502 | ||
505 | while(!(ch=active_read_buff_read())) |
503 | while(!(ch=active_read_buff_read())) |
506 | { |
504 | { |
507 | __u8 x; |
505 | __u8 x; |
508 | while (!((x=inb(i8042_STATUS))&i8042_BUFFER_FULL_MASK)); |
506 | while (!((x=inb(i8042_STATUS))&i8042_BUFFER_FULL_MASK)); |
509 | x = inb(i8042_DATA); |
507 | x = inb(i8042_DATA); |
510 | if (x & KEY_RELEASE) |
508 | if (x & KEY_RELEASE) |
511 | key_released(x ^ KEY_RELEASE); |
509 | key_released(x ^ KEY_RELEASE); |
512 | else |
510 | else |
513 | active_readed_key_pressed(x); |
511 | active_read_key_pressed(x); |
514 | } |
512 | } |
515 | return ch; |
513 | return ch; |
516 | } |
514 | } |
517 | - | ||
518 | - |