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46 | */ |
46 | */ |
47 | 47 | ||
48 | #define i8042_DATA 0x60 |
48 | #define i8042_DATA 0x60 |
49 | #define i8042_STATUS 0x64 |
49 | #define i8042_STATUS 0x64 |
50 | 50 | ||
- | 51 | ||
51 | /** Keyboard commands. */ |
52 | /** Keyboard commands. */ |
52 | #define KBD_ENABLE 0xf4 |
53 | #define KBD_ENABLE 0xf4 |
53 | #define KBD_DISABLE 0xf5 |
54 | #define KBD_DISABLE 0xf5 |
54 | #define KBD_ACK 0xfa |
55 | #define KBD_ACK 0xfa |
55 | 56 | ||
- | 57 | /* |
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- | 58 | 60 Write 8042 Command Byte: next data byte written to port 60h is |
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- | 59 | placed in 8042 command register.Format: |
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- | 60 | ||
- | 61 | |7|6|5|4|3|2|1|0|8042 Command Byte |
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- | 62 | | | | | | | | `---- 1=enable output register full interrupt |
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- | 63 | | | | | | | `----- should be 0 |
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- | 64 | | | | | | `------ 1=set status register system, 0=clear |
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- | 65 | | | | | `------- 1=override keyboard inhibit, 0=allow inhibit |
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- | 66 | | | | `-------- disable keyboard I/O by driving clock line low |
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- | 67 | | | `--------- disable auxiliary device, drives clock line low |
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- | 68 | | `---------- IBM scancode translation 0=AT, 1=PC/XT |
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- | 69 | `----------- reserved, should be 0 |
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- | 70 | */ |
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- | 71 | ||
- | 72 | #define i8042_SET_COMMAND 0x60 |
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- | 73 | #define i8042_COMMAND 0x09 |
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- | 74 | #define i8042_WAIT_MASK 0x02 |
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- | 75 | ||
- | 76 | ||
56 | #define SPECIAL '?' |
77 | #define SPECIAL '?' |
57 | #define KEY_RELEASE 0x80 |
78 | #define KEY_RELEASE 0x80 |
58 | 79 | ||
59 | static void key_released(__u8 sc); |
80 | static void key_released(__u8 sc); |
60 | static void key_pressed(__u8 sc); |
81 | static void key_pressed(__u8 sc); |
Line 240... | Line 261... | ||
240 | 261 | ||
241 | /** Initialize i8042. */ |
262 | /** Initialize i8042. */ |
242 | void i8042_init(void) |
263 | void i8042_init(void) |
243 | { |
264 | { |
244 | exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); |
265 | exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); |
- | 266 | while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ |
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- | 267 | outb(i8042_STATUS,i8042_SET_COMMAND); |
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- | 268 | while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ |
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- | 269 | outb(i8042_DATA,i8042_COMMAND); |
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- | 270 | ||
245 | trap_virtual_enable_irqs(1<<IRQ_KBD); |
271 | trap_virtual_enable_irqs(1<<IRQ_KBD); |
246 | chardev_initialize("i8042_kbd", &kbrd, &ops); |
272 | chardev_initialize("i8042_kbd", &kbrd, &ops); |
247 | stdin = &kbrd; |
273 | stdin = &kbrd; |
248 | } |
274 | } |
249 | 275 |