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Line 33... | Line 33... | ||
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_sparc64_MMU_H_ |
35 | #ifndef KERN_sparc64_MMU_H_ |
36 | #define KERN_sparc64_MMU_H_ |
36 | #define KERN_sparc64_MMU_H_ |
37 | 37 | ||
- | 38 | #if defined(US) |
|
38 | /* LSU Control Register ASI. */ |
39 | /* LSU Control Register ASI. */ |
39 | #define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ |
40 | #define ASI_LSU_CONTROL_REG 0x45 /**< Load/Store Unit Control Register. */ |
- | 41 | #endif |
|
40 | 42 | ||
41 | /* I-MMU ASIs. */ |
43 | /* I-MMU ASIs. */ |
42 | #define ASI_IMMU 0x50 |
44 | #define ASI_IMMU 0x50 |
43 | #define ASI_IMMU_TSB_8KB_PTR_REG 0x51 |
45 | #define ASI_IMMU_TSB_8KB_PTR_REG 0x51 |
44 | #define ASI_IMMU_TSB_64KB_PTR_REG 0x52 |
46 | #define ASI_IMMU_TSB_64KB_PTR_REG 0x52 |
Line 78... | Line 80... | ||
78 | 80 | ||
79 | #include <arch/asm.h> |
81 | #include <arch/asm.h> |
80 | #include <arch/barrier.h> |
82 | #include <arch/barrier.h> |
81 | #include <arch/types.h> |
83 | #include <arch/types.h> |
82 | 84 | ||
- | 85 | #if defined(US) |
|
83 | /** LSU Control Register. */ |
86 | /** LSU Control Register. */ |
84 | typedef union { |
87 | typedef union { |
85 | uint64_t value; |
88 | uint64_t value; |
86 | struct { |
89 | struct { |
87 | unsigned : 23; |
90 | unsigned : 23; |
Line 98... | Line 101... | ||
98 | unsigned dc : 1; /**< D-Cache enable. */ |
101 | unsigned dc : 1; /**< D-Cache enable. */ |
99 | unsigned ic : 1; /**< I-Cache enable. */ |
102 | unsigned ic : 1; /**< I-Cache enable. */ |
100 | 103 | ||
101 | } __attribute__ ((packed)); |
104 | } __attribute__ ((packed)); |
102 | } lsu_cr_reg_t; |
105 | } lsu_cr_reg_t; |
- | 106 | #endif /* US */ |
|
103 | 107 | ||
104 | #endif /* !def __ASM__ */ |
108 | #endif /* !def __ASM__ */ |
105 | 109 | ||
106 | #endif |
110 | #endif |
107 | 111 |