Rev 1848 | Rev 1875 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1848 | Rev 1849 | ||
---|---|---|---|
Line 68... | Line 68... | ||
68 | #define RR12 12 |
68 | #define RR12 12 |
69 | #define RR13 13 |
69 | #define RR13 13 |
70 | #define RR14 14 |
70 | #define RR14 14 |
71 | #define RR15 15 |
71 | #define RR15 15 |
72 | 72 | ||
- | 73 | /* Write Register 0 */ |
|
- | 74 | #define WR0_ERR_RST (0x6<<3) |
|
- | 75 | ||
73 | /* Write Register 1 */ |
76 | /* Write Register 1 */ |
74 | #define WR1_RID (0x0<<3) /** Receive Interrupts Disabled. */ |
77 | #define WR1_RID (0x0<<3) /** Receive Interrupts Disabled. */ |
75 | #define WR1_RIFCSC (0x1<<3) /** Receive Interrupt on First Character or Special Condition. */ |
78 | #define WR1_RIFCSC (0x1<<3) /** Receive Interrupt on First Character or Special Condition. */ |
76 | #define WR1_IARCSC (0x2<<3) /** Interrupt on All Receive Characters or Special Conditions. */ |
79 | #define WR1_IARCSC (0x2<<3) /** Interrupt on All Receive Characters or Special Conditions. */ |
77 | #define WR1_RISC (0x3<<3) /** Receive Interrupt on Special Condition. */ |
80 | #define WR1_RISC (0x3<<3) /** Receive Interrupt on Special Condition. */ |