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Line 33... | Line 33... | ||
33 | #include <arch/asm.h> |
33 | #include <arch/asm.h> |
34 | #include <mm/vm.h> |
34 | #include <mm/vm.h> |
35 | #include <userspace.h> |
35 | #include <userspace.h> |
36 | #include <arch/console.h> |
36 | #include <arch/console.h> |
37 | #include <memstr.h> |
37 | #include <memstr.h> |
- | 38 | #include <arch/interrupt.h> |
|
38 | 39 | ||
39 | /* Size of the code jumping to the exception handler code |
40 | /* Size of the code jumping to the exception handler code |
40 | * - J+NOP |
41 | * - J+NOP |
41 | */ |
42 | */ |
42 | #define EXCEPTION_JUMP_SIZE 8 |
43 | #define EXCEPTION_JUMP_SIZE 8 |
Line 45... | Line 46... | ||
45 | #define NORM_EXC ((char *) 0x80000180) |
46 | #define NORM_EXC ((char *) 0x80000180) |
46 | #define CACHE_EXC ((char *) 0x80000100) |
47 | #define CACHE_EXC ((char *) 0x80000100) |
47 | 48 | ||
48 | #include <arch/debug.h> |
49 | #include <arch/debug.h> |
49 | 50 | ||
- | 51 | #include <print.h> |
|
50 | void arch_pre_mm_init(void) |
52 | void arch_pre_mm_init(void) |
51 | { |
53 | { |
- | 54 | /* It is not assumed by default */ |
|
- | 55 | cpu_priority_high(); |
|
- | 56 | ||
52 | /* Copy the exception vectors to the right places */ |
57 | /* Copy the exception vectors to the right places */ |
53 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
58 | memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
54 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
59 | memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); |
55 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
60 | memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); |
56 | 61 | ||
57 | - | ||
58 | /* |
62 | /* |
59 | * Switch to BEV normal level so that exception vectors point to the kernel. |
63 | * Switch to BEV normal level so that exception vectors point to the kernel. |
60 | * Clear the error level. |
64 | * Clear the error level. |
61 | */ |
65 | */ |
62 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
66 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); |
63 | 67 | ||
- | 68 | /* |
|
- | 69 | * Mask all interrupts |
|
- | 70 | */ |
|
- | 71 | cp0_mask_all_int(); |
|
64 | /* |
72 | /* |
65 | * Unmask hardware clock interrupt. |
73 | * Unmask hardware clock interrupt. |
66 | */ |
74 | */ |
67 | cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift)); |
75 | cp0_unmask_int(TIMER_INTERRUPT); |
68 | 76 | ||
69 | /* |
77 | /* |
70 | * Start hardware clock. |
78 | * Start hardware clock. |
71 | */ |
79 | */ |
72 | cp0_compare_write(cp0_compare_value + cp0_count_read()); |
80 | cp0_compare_write(cp0_compare_value + cp0_count_read()); |