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5 | @ "ia32" Intel IA-32 |
5 | @ "ia32" Intel IA-32 |
6 | @ "ia64" Intel IA-64 |
6 | @ "ia64" Intel IA-64 |
7 | @ "mips32" MIPS 32-bit |
7 | @ "mips32" MIPS 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
9 | @ "ppc64" PowerPC 64-bit |
9 | @ "ppc64" PowerPC 64-bit |
10 | @ "sparc64" Sun UltraSPARC |
10 | @ "sparc64" Sun UltraSPARC 64-bit |
11 | @ "xen32" Xen 32-bit |
11 | @ "xen32" Xen 32-bit |
12 | ! ARCH (choice) |
12 | ! ARCH (choice) |
13 | 13 | ||
14 | # IA32 Compiler |
- | |
15 | @ "cross" Cross-compiler |
- | |
16 | @ "native" Native |
- | |
17 | ! [ARCH=ia32] IA32_COMPILER (choice) |
- | |
18 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
- | |
19 | - | ||
20 | # AMD64 Compiler |
- | |
21 | @ "cross" Cross-compiler |
- | |
22 | @ "native" Native |
- | |
23 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
- | |
24 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
- | |
25 | - | ||
26 | # Compiler |
14 | # Compiler |
27 | @ "cross" Cross-compiler |
15 | @ "cross" Cross-compiler |
28 | @ "native" Native |
16 | @ "native" Native |
29 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
17 | ! COMPILER (choice) |
30 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
- | |
31 | - | ||
32 | 18 | ||
33 | # CPU type |
19 | # CPU type |
34 | @ "pentium4" Pentium 4 |
20 | @ "pentium4" Pentium 4 |
35 | @ "pentium3" Pentium 3 |
21 | @ "pentium3" Pentium 3 |
36 | @ "athlon-xp" Athlon XP |
22 | @ "athlon-xp" Athlon XP |
37 | @ "athlon-mp" Athlon MP |
23 | @ "athlon-mp" Athlon MP |
38 | @ "prescott" Prescott |
24 | @ "prescott" Prescott |
39 | ! [ARCH=ia32|ARCH=xen32] IA32_CPU (choice) |
25 | ! [ARCH=ia32|ARCH=xen32] MACHINE (choice) |
- | 26 | ||
- | 27 | # CPU type |
|
- | 28 | @ "opteron" Opteron |
|
- | 29 | ! [ARCH=amd64] MACHINE (choice) |
|
40 | 30 | ||
41 | # MIPS Machine type |
31 | # Machine type |
42 | @ "msim" MSIM Simulator |
32 | @ "msim" MSIM Simulator |
43 | @ "simics" Virtutech Simics simulator |
33 | @ "simics" Virtutech Simics simulator |
44 | @ "lgxemul" GXEmul Little Endian |
34 | @ "lgxemul" GXEmul Little Endian |
45 | @ "bgxemul" GXEmul Big Endian |
35 | @ "bgxemul" GXEmul Big Endian |
46 | @ "indy" SGI Indy |
36 | @ "indy" SGI Indy |
47 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
37 | ! [ARCH=mips32] MACHINE (choice) |
48 | 38 | ||
49 | # Framebuffer support |
39 | # Framebuffer support |
50 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=xen32)] CONFIG_FB (y/n) |
40 | ! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=xen32)] CONFIG_FB (y/n) |
51 | 41 | ||
52 | # Framebuffer width |
42 | # Framebuffer width |
53 | @ "320" |
- | |
54 | @ "640" |
43 | @ "640" |
55 | @ "800" |
44 | @ "800" |
56 | @ "1024" |
45 | @ "1024" |
57 | @ "1152" |
46 | @ "1152" |
58 | @ "1280" |
47 | @ "1280" |
Line 61... | Line 50... | ||
61 | @ "1600" |
50 | @ "1600" |
62 | @ "2048" |
51 | @ "2048" |
63 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
52 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice) |
64 | 53 | ||
65 | # Framebuffer height |
54 | # Framebuffer height |
66 | @ "200" |
- | |
67 | @ "240" |
- | |
68 | @ "400" |
- | |
69 | @ "480" |
55 | @ "480" |
70 | @ "600" |
56 | @ "600" |
71 | @ "768" |
57 | @ "768" |
72 | @ "852" |
58 | @ "852" |
73 | @ "900" |
59 | @ "900" |
Line 82... | Line 68... | ||
82 | @ "8" |
68 | @ "8" |
83 | @ "16" |
69 | @ "16" |
84 | @ "24" |
70 | @ "24" |
85 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
71 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
86 | 72 | ||
87 | - | ||
88 | - | ||
89 | # Support for SMP |
73 | # Support for SMP |
90 | ! [ARCH=ia32|ARCH=amd64|ARCH=xen32] CONFIG_SMP (y/n) |
74 | ! [ARCH=ia32|ARCH=amd64|ARCH=xen32] CONFIG_SMP (y/n) |
91 | 75 | ||
92 | # Improved support for hyperthreading |
76 | # Improved support for hyperthreading |
93 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_HT (y/n) |
77 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_HT (y/n) |
94 | 78 | ||
95 | # Simics BIOS AP boot fix |
79 | # Simics BIOS AP boot fix |
96 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
80 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
97 | 81 | ||
98 | # Lazy FPU context switching |
82 | # Lazy FPU context switching |
99 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=xen32] CONFIG_FPU_LAZY (y/n) |
83 | ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=xen32] CONFIG_FPU_LAZY (y/n) |
100 | 84 | ||
101 | # Power off on halt |
85 | # Power off on halt |
102 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
86 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
103 | 87 | ||
104 | ## Debugging configuration directives |
88 | ## Debugging configuration directives |
Line 114... | Line 98... | ||
114 | 98 | ||
115 | # Save all interrupt registers |
99 | # Save all interrupt registers |
116 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_ALLREGS (y/n) |
100 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_ALLREGS (y/n) |
117 | 101 | ||
118 | # Use VHPT |
102 | # Use VHPT |
119 | ! [ARCH=ia64] CONFIG_VHPT (y/n) |
103 | ! [ARCH=ia64] CONFIG_VHPT (n/y) |
120 | 104 | ||
121 | ## Run-time configuration directives |
105 | ## Run-time configuration directives |
122 | 106 | ||
123 | # Kernel test type |
107 | # Kernel test type |
124 | @ "" No test |
108 | @ "" No test |
Line 131... | Line 115... | ||
131 | @ "synch/rwlock5" Read write test 5 |
115 | @ "synch/rwlock5" Read write test 5 |
132 | @ "synch/semaphore1" Semaphore test 1 |
116 | @ "synch/semaphore1" Semaphore test 1 |
133 | @ "synch/semaphore2" Sempahore test 2 |
117 | @ "synch/semaphore2" Sempahore test 2 |
134 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=xen32] "fpu/fpu1" Intel fpu test 1 |
118 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=xen32] "fpu/fpu1" Intel fpu test 1 |
135 | @ [ARCH=ia32|ARCH=amd64|ARCH=xen32] "fpu/sse1" Intel Sse test 1 |
119 | @ [ARCH=ia32|ARCH=amd64|ARCH=xen32] "fpu/sse1" Intel Sse test 1 |
136 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
120 | @ [ARCH=mips32&MACHINE!=msim&MACHINE!=simics] "fpu/mips1" MIPS FPU test 1 |
137 | @ "print/print1" Printf test 1 |
121 | @ "print/print1" Printf test 1 |
138 | @ "thread/thread1" Thread test 1 |
122 | @ "thread/thread1" Thread test 1 |
139 | @ "mm/mapping1" Mapping test 1 |
123 | @ "mm/mapping1" Mapping test 1 |
140 | @ "mm/falloc1" Frame Allocation test 1 |
124 | @ "mm/falloc1" Frame Allocation test 1 |
141 | @ "mm/falloc2" Frame Allocation test 2 |
125 | @ "mm/falloc2" Frame Allocation test 2 |
142 | @ "mm/slab1" SLAB test1 - No CPU-cache |
126 | @ "mm/slab1" SLAB test1 - No CPU cache |
143 | @ "mm/slab2" SLAB test2 - SMP CPU cache |
127 | @ "mm/slab2" SLAB test2 - SMP CPU cache |
144 | @ "fault/fault1" Write to NULL (maybe page fault) |
128 | @ "fault/fault1" Write to NULL (maybe page fault) |
145 | @ "sysinfo" Sysinfo fill and dump test |
129 | @ "sysinfo" Sysinfo fill and dump test |
146 | @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
130 | @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
147 | @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test |
131 | @ [ARCH=mips32] "debug/mips1" MIPS breakpoint-debug test |
148 | ! CONFIG_TEST (choice) |
132 | ! CONFIG_TEST (choice) |