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Line 110... | Line 110... | ||
110 | *(uint32_t*) gxemul_hw_map.irqc_unmask = irq; |
110 | *(uint32_t*) gxemul_hw_map.irqc_unmask = irq; |
111 | } |
111 | } |
112 | 112 | ||
113 | 113 | ||
114 | /** Initializes #gxemul_hw_map. */ |
114 | /** Initializes #gxemul_hw_map. */ |
115 | void machine_hw_map_init(void) |
115 | void gxemul_hw_map_init(void) |
116 | { |
116 | { |
117 | gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE); |
117 | gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE); |
118 | gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE); |
118 | gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE); |
119 | gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE); |
119 | gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE); |
120 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
120 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
Line 195... | Line 195... | ||
195 | { |
195 | { |
196 | return IRQ_ACCEPT; |
196 | return IRQ_ACCEPT; |
197 | } |
197 | } |
198 | 198 | ||
199 | 199 | ||
200 | void machine_grab_console(void) |
200 | void gxemul_grab_console(void) |
201 | { |
201 | { |
202 | ipl_t ipl = interrupts_disable(); |
202 | ipl_t ipl = interrupts_disable(); |
203 | spinlock_lock(&gxemul_irq.lock); |
203 | spinlock_lock(&gxemul_irq.lock); |
204 | gxemul_irq.notif_cfg.notify = false; |
204 | gxemul_irq.notif_cfg.notify = false; |
205 | spinlock_unlock(&gxemul_irq.lock); |
205 | spinlock_unlock(&gxemul_irq.lock); |
206 | interrupts_restore(ipl); |
206 | interrupts_restore(ipl); |
207 | } |
207 | } |
208 | 208 | ||
209 | 209 | ||
210 | void machine_release_console(void) |
210 | void gxemul_release_console(void) |
211 | { |
211 | { |
212 | ipl_t ipl = interrupts_disable(); |
212 | ipl_t ipl = interrupts_disable(); |
213 | spinlock_lock(&gxemul_irq.lock); |
213 | spinlock_lock(&gxemul_irq.lock); |
214 | if (gxemul_irq.notif_cfg.answerbox) { |
214 | if (gxemul_irq.notif_cfg.answerbox) { |
215 | gxemul_irq.notif_cfg.notify = true; |
215 | gxemul_irq.notif_cfg.notify = true; |
Line 221... | Line 221... | ||
221 | 221 | ||
222 | /** Initializes console object representing gxemul console. |
222 | /** Initializes console object representing gxemul console. |
223 | * |
223 | * |
224 | * @param Console device number. |
224 | * @param Console device number. |
225 | */ |
225 | */ |
226 | void machine_console_init(devno_t devno) |
226 | void gxemul_console_init(devno_t devno) |
227 | { |
227 | { |
228 | chardev_initialize("gxemul_console", &console, &gxemul_ops); |
228 | chardev_initialize("gxemul_console", &console, &gxemul_ops); |
229 | stdin = &console; |
229 | stdin = &console; |
230 | stdout = &console; |
230 | stdout = &console; |
231 | 231 | ||
Line 315... | Line 315... | ||
315 | /** Starts timer. |
315 | /** Starts timer. |
316 | * |
316 | * |
317 | * Initiates regular timer interrupts after initializing |
317 | * Initiates regular timer interrupts after initializing |
318 | * corresponding interrupt handler. |
318 | * corresponding interrupt handler. |
319 | */ |
319 | */ |
320 | void machine_timer_irq_start() |
320 | void gxemul_timer_irq_start() |
321 | { |
321 | { |
322 | gxemul_timer_irq_init(); |
322 | gxemul_timer_irq_init(); |
323 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
323 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
324 | } |
324 | } |
325 | 325 | ||
326 | 326 | ||
327 | /** Returns the size of emulated memory. |
327 | /** Returns the size of emulated memory. |
328 | * |
328 | * |
329 | * @return Size in bytes. |
329 | * @return Size in bytes. |
330 | */ |
330 | */ |
331 | size_t machine_get_memory_size(void) |
331 | size_t gxemul_get_memory_size(void) |
332 | { |
332 | { |
333 | return *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
333 | return *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
334 | } |
334 | } |
335 | 335 | ||
336 | 336 | ||
337 | void machine_debug_putc(char ch) |
337 | void gxemul_debug_putc(char ch) |
338 | { |
338 | { |
339 | char * addr = 0; |
339 | char * addr = 0; |
340 | if (!hw_map_init_called) { |
340 | if (!hw_map_init_called) { |
341 | addr = (char *) GXEMUL_KBD; |
341 | addr = (char *) GXEMUL_KBD; |
342 | } else { |
342 | } else { |
Line 346... | Line 346... | ||
346 | *(addr) = ch; |
346 | *(addr) = ch; |
347 | } |
347 | } |
348 | 348 | ||
349 | 349 | ||
350 | /** Stops gxemul. */ |
350 | /** Stops gxemul. */ |
351 | void machine_cpu_halt(void) |
351 | void gxemul_cpu_halt(void) |
352 | { |
352 | { |
353 | char * addr = 0; |
353 | char * addr = 0; |
354 | if (!hw_map_init_called) { |
354 | if (!hw_map_init_called) { |
355 | addr = (char *) GXEMUL_KBD; |
355 | addr = (char *) GXEMUL_KBD; |
356 | } else { |
356 | } else { |
Line 367... | Line 367... | ||
367 | * calls high-level handlers for them. |
367 | * calls high-level handlers for them. |
368 | * |
368 | * |
369 | * @param exc_no Interrupt exception number. |
369 | * @param exc_no Interrupt exception number. |
370 | * @param istate Saved processor state. |
370 | * @param istate Saved processor state. |
371 | */ |
371 | */ |
372 | void machine_irq_exception(int exc_no, istate_t *istate) |
372 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
373 | { |
373 | { |
374 | uint32_t sources = gxemul_irqc_get_sources(); |
374 | uint32_t sources = gxemul_irqc_get_sources(); |
375 | int i = 0; |
375 | int i = 0; |
376 | for (; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
376 | for (; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
377 | if (sources & (1 << i)) { |
377 | if (sources & (1 << i)) { |
Line 387... | Line 387... | ||
387 | } |
387 | } |
388 | } |
388 | } |
389 | } |
389 | } |
390 | 390 | ||
391 | 391 | ||
392 | uintptr_t machine_get_fb_address(void) |
392 | uintptr_t gxemul_get_fb_address(void) |
393 | { |
393 | { |
394 | return gxemul_hw_map.fb; |
394 | return gxemul_hw_map.fb; |
395 | } |
395 | } |
396 | 396 | ||
397 | /** @} |
397 | /** @} |