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    __asm__ volatile ("and %%o6, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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    __asm__ volatile ("and %%o6, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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    return v;
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    return v;
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}
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}
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/** Read Trap Base Address register.
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 *
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 * @return Current value in TBA.
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 */
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static inline __u64 tba_read(void)
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{
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    __u64 v;
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    __asm__ volatile ("rdpr %%tba, %0\n" : "=r" (v));
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    return v;
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}
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/** Write Trap Base Address register.
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 *
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 * @param New value of TBA.
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 */
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static inline void tba_write(__u64 v)
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{
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    __asm__ volatile ("wrpr %0, %1, %%tba\n" : : "r" (v), "i" (0));
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}
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void cpu_halt(void);
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void cpu_halt(void);
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void cpu_sleep(void);
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void cpu_sleep(void);
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void asm_delay_loop(__u32 t);
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void asm_delay_loop(__u32 t);
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#endif
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#endif