WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/ia64/src/mm/tlb.c

+{
     tlb_invalidate_all();
+}
-void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
+void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
+{
     region_register rr;
     bool restore_rr = false;
     int b = 0;
     int c = cnt;
  * @param entry     The rest of TLB entry as required by TLB insertion
  *          format.
  * @param tr        Translation register.
  */
 void
-itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
+itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr)
+{
     tr_mapping_insert(va, asid, entry, false, tr);
+}
 /** Insert data into data translation register.
  * @param entry     The rest of TLB entry as required by TLB insertion
  *          format.
  * @param tr        Translation register.
  */
 void
-dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, index_t tr)
+dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr)
+{
     tr_mapping_insert(va, asid, entry, true, tr);
+}
 /** Insert data into instruction or data translation register.
  *          instruction translation register otherwise.
  * @param tr        Translation register.
  */
 void
 tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr,
-    index_t tr)
+    size_t tr)
+{
     region_register rr;
     bool restore_rr = false;
     rr.word = rr_read(VA2VRN(va));
  *          translation cache otherwise.
  * @param tr        Translation register if dtr is true, ignored otherwise.
  */
 void
 dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr,
-    index_t tr)
+    size_t tr)
+{
     tlb_entry_t entry;
     entry.word[0] = 0;
     entry.word[1] = 0;
  * Purge DTR entries used by the kernel.
+ *
  * @param page      Virtual page address including VRN bits.
  * @param width     Width of the purge in bits.
  */
-void dtr_purge(uintptr_t page, count_t width)
+void dtr_purge(uintptr_t page, size_t width)
+{
     asm volatile ("ptr.d %0, %1\n" : : "r" (page), "r" (width << 2));
+}
+        }
+    }
     page_table_unlock(AS, true);
+}
+/** Data access rights fault handler.
+ *
+ * @param vector Interruption vector.
+ * @param istate Structure with saved interruption state.
+ */
+void data_access_rights_fault(uint64_t vector, istate_t *istate)
+{
+    region_register rr;
+    rid_t rid;
+    uintptr_t va;
+    pte_t *t;
+    va = istate->cr_ifa;    /* faulting address */
+    rr.word = rr_read(VA2VRN(va));
+    rid = rr.map.rid;
+    /*
+     * Assume a write to a read-only page.
+     */
+    page_table_lock(AS, true);
+    t = page_mapping_find(AS, va);
+    ASSERT(t && t->p);
+    ASSERT(!t->w);
+    if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
+        fault_if_from_uspace(istate, "Page fault at %p.", va);
+        panic("%s: va=%p, rid=%d, iip=%p.", __func__, va, rid,
+            istate->cr_iip);
+    }
+    page_table_unlock(AS, true);
+}
 /** Page not present fault handler.
+ *
  * @param vector Interruption vector.
  * @param istate Structure with saved interruption state.
  */

Subversion Repositories HelenOS

(root)/branches/dynload/kernel/arch/ia64/src/mm/tlb.c @ 3846 – Rev 4344 → 4691