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Rev 125 | Rev 141 | ||
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Line 126... | Line 126... | ||
126 | trap_register( 7, nm_fault); |
126 | trap_register( 7, nm_fault); |
127 | trap_register(12, ss_fault); |
127 | trap_register(12, ss_fault); |
128 | } |
128 | } |
129 | 129 | ||
130 | 130 | ||
- | 131 | ||
- | 132 | static void clean_IOPL_NT_flags(void) |
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- | 133 | { |
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- | 134 | asm |
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- | 135 | ( |
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- | 136 | "pushfl;" |
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- | 137 | "pop %%eax;" |
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- | 138 | "and $0xffff8fff,%%eax;" |
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- | 139 | "push %%eax;" |
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- | 140 | "popfl;" |
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- | 141 | : |
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- | 142 | : |
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- | 143 | :"%eax" |
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- | 144 | ); |
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- | 145 | } |
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- | 146 | ||
- | 147 | ||
- | 148 | ||
- | 149 | ||
131 | void pm_init(void) |
150 | void pm_init(void) |
132 | { |
151 | { |
133 | struct descriptor *gdt_p = (struct descriptor *) PA2KA(gdtr.base); |
152 | struct descriptor *gdt_p = (struct descriptor *) PA2KA(gdtr.base); |
134 | 153 | ||
135 | /* |
154 | /* |
Line 163... | Line 182... | ||
163 | /* |
182 | /* |
164 | * As of this moment, the current CPU has its own GDT pointing |
183 | * As of this moment, the current CPU has its own GDT pointing |
165 | * to its own TSS. We just need to load the TR register. |
184 | * to its own TSS. We just need to load the TR register. |
166 | */ |
185 | */ |
167 | __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
186 | __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
- | 187 | ||
- | 188 | clean_IOPL_NT_flags(); |
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168 | } |
189 | } |