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     * on AMD64 it is 64-bit - 2 items in table */
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     * on AMD64 it is 64-bit - 2 items in table */
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    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
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    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
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};
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};
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struct ptr_16_64 gdtr = {.limit = sizeof(gdtr), .base= (__u64)KA2PA(&gdt) };
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struct idescriptor idt[IDT_ITEMS];
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struct idescriptor idt[IDT_ITEMS];
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struct ptr_16_64 gdtr = {.limit = sizeof(gdt), .base= (__u64) &gdt };
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struct ptr_16_64 idtr = {.limit = sizeof(idt), .base= (__u64) &idt };
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static struct tss tss;
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static struct tss tss;
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struct tss *tss_p = NULL;
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struct tss *tss_p = NULL;
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/* TODO: Does not compile correctly if it does not exist ???? */
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/* TODO: Does not compile correctly if it does not exist ???? */
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int __attribute__ ((section ("K_DATA_START"))) __fake;
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int __attribute__ ((section ("K_DATA_START"))) __fake;
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    );
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    );
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}
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}
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void pm_init(void)
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void pm_init(void)
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{
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{
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    struct descriptor *gdt_p = (struct descriptor *) PA2KA(gdtr.base);
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    struct descriptor *gdt_p = (struct descriptor *) gdtr.base;
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    struct tss_descriptor *tss_desc;
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    struct tss_descriptor *tss_desc;
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    /*
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    /*
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     * Each CPU has its private GDT and TSS.
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     * Each CPU has its private GDT and TSS.
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     * All CPUs share one IDT.
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     * All CPUs share one IDT.
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    tss_desc->dpl = PL_KERNEL;
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    tss_desc->dpl = PL_KERNEL;
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    gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
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    gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
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    gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
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    gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
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- 
 
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    __asm__("lgdt %0" : : "m"(gdtr));
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    __asm__("lidt %0" : : "m"(idtr));
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    /*
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    /*
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     * As of this moment, the current CPU has its own GDT pointing
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     * As of this moment, the current CPU has its own GDT pointing
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     * to its own TSS. We just need to load the TR register.
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     * to its own TSS. We just need to load the TR register.
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     */
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     */
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    __asm__("ltr %0" : : "r" ((__u16) gdtselector(TSS_DES)));
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    __asm__("ltr %0" : : "r" ((__u16) gdtselector(TSS_DES)));