Rev 619 | Rev 630 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 619 | Rev 627 | ||
---|---|---|---|
Line 33... | Line 33... | ||
33 | #include <arch/mm/mmu.h> |
33 | #include <arch/mm/mmu.h> |
34 | #include <print.h> |
34 | #include <print.h> |
35 | #include <arch/types.h> |
35 | #include <arch/types.h> |
36 | #include <typedefs.h> |
36 | #include <typedefs.h> |
37 | #include <config.h> |
37 | #include <config.h> |
- | 38 | #include <arch/trap.h> |
|
38 | 39 | ||
39 | /** Initialize ITLB and DTLB. |
40 | /** Initialize ITLB and DTLB. |
40 | * |
41 | * |
41 | * The goal of this function is to disable MMU |
42 | * The goal of this function is to disable MMU |
42 | * so that both TLBs can be purged and new |
43 | * so that both TLBs can be purged and new |
43 | * kernel 4M locked entry can be installed. |
44 | * kernel 4M locked entry can be installed. |
44 | * After TLB is initialized, MMU is enabled |
45 | * After TLB is initialized, MMU is enabled |
45 | * again. |
46 | * again. |
- | 47 | * |
|
- | 48 | * Switching MMU off imposes the requirement for |
|
- | 49 | * the kernel to run in identity mapped environment. |
|
46 | */ |
50 | */ |
47 | void tlb_arch_init(void) |
51 | void tlb_arch_init(void) |
48 | { |
52 | { |
49 | tlb_tag_access_reg_t tag; |
53 | tlb_tag_access_reg_t tag; |
50 | tlb_data_t data; |
54 | tlb_data_t data; |
Line 79... | Line 83... | ||
79 | data.g = true; |
83 | data.g = true; |
80 | 84 | ||
81 | itlb_data_in_write(data.value); |
85 | itlb_data_in_write(data.value); |
82 | dtlb_data_in_write(data.value); |
86 | dtlb_data_in_write(data.value); |
83 | 87 | ||
- | 88 | /* |
|
- | 89 | * Register window traps can occur before MMU is enabled again. |
|
- | 90 | * This ensures that any such traps will be handled from |
|
- | 91 | * kernel identity mapped trap handler. |
|
- | 92 | */ |
|
- | 93 | trap_switch_trap_table(); |
|
- | 94 | ||
84 | tlb_invalidate_all(); |
95 | tlb_invalidate_all(); |
85 | 96 | ||
86 | dmmu_enable(); |
97 | dmmu_enable(); |
87 | immu_enable(); |
98 | immu_enable(); |
88 | } |
99 | } |