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| 40 | #define ASI_AIUP 0x10 /** Access to primary context with user privileges. */ |
40 | #define ASI_AIUP 0x10 /** Access to primary context with user privileges. */ |
| 41 | #define ASI_AIUS 0x11 /** Access to secondary context with user privileges. */ |
41 | #define ASI_AIUS 0x11 /** Access to secondary context with user privileges. */ |
| 42 | #define ASI_NUCLEUS_QUAD_LDD 0x24 /** ASI for 16-byte atomic loads. */ |
42 | #define ASI_NUCLEUS_QUAD_LDD 0x24 /** ASI for 16-byte atomic loads. */ |
| 43 | #define ASI_DCACHE_TAG 0x47 /** ASI D-Cache Tag. */ |
43 | #define ASI_DCACHE_TAG 0x47 /** ASI D-Cache Tag. */ |
| 44 | #define ASI_UPA_CONFIG 0x4a /** ASI of the UPA_CONFIG register. */ |
44 | #define ASI_ICBUS_CONFIG 0x4a /** ASI of the UPA_CONFIG/FIREPLANE_CONFIG register. */ |
| 45 | 45 | ||
| 46 | #define NWINDOWS 8 /** Number of register window sets. */ |
46 | #define NWINDOWS 8 /** Number of register window sets. */ |
| 47 | 47 | ||
| - | 48 | #ifndef __ASM__ |
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| - | 49 | ||
| - | 50 | extern void arch_pre_main(void); |
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| - | 51 | ||
| - | 52 | #endif /* __ASM__ */ |
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| - | 53 | ||
| 48 | #endif |
54 | #endif |
| 49 | 55 | ||
| 50 | /** @} |
56 | /** @} |
| 51 | */ |
57 | */ |