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Rev 3022 Rev 4055
Line 40... Line 40...
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#include <arch/types.h>
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#include <arch/types.h>
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#include <print.h>
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#include <print.h>
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#include <fpu_context.h>
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#include <fpu_context.h>
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43
 
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#include <arch/smp/apic.h>
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#include <arch/smp/apic.h>
-
 
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#include <arch/syscall.h>
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46
 
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/*
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/*
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 * Identification of CPUs.
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 * Identification of CPUs.
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 * Contains only non-MP-Specification specific SMP code.
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 * Contains only non-MP-Specification specific SMP code.
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 */
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 */
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#define AMD_CPUID_EBX   0x68747541
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#define AMD_CPUID_EBX  0x68747541
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#define AMD_CPUID_ECX   0x444d4163
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#define AMD_CPUID_ECX  0x444d4163
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#define AMD_CPUID_EDX   0x69746e65
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#define AMD_CPUID_EDX  0x69746e65
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#define INTEL_CPUID_EBX 0x756e6547
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#define INTEL_CPUID_EBX  0x756e6547
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#define INTEL_CPUID_ECX 0x6c65746e
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#define INTEL_CPUID_ECX  0x6c65746e
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#define INTEL_CPUID_EDX 0x49656e69
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#define INTEL_CPUID_EDX  0x49656e69
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enum vendor {
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enum vendor {
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    VendorUnknown=0,
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    VendorUnknown = 0,
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    VendorAMD,
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    VendorAMD,
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    VendorIntel
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    VendorIntel
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};
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};
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static char *vendor_str[] = {
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static char *vendor_str[] = {
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    "Unknown Vendor",
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    "Unknown Vendor",
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    "AuthenticAMD",
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    "AMD",
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    "GenuineIntel"
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    "Intel"
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};
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};
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void fpu_disable(void)
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void fpu_disable(void)
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{
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{
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    asm volatile (
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    asm volatile (
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        "mov %%cr0,%%eax;"
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        "mov %%cr0, %%eax\n"
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        "or $8,%%eax;"
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        "or $8, %%eax\n"
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        "mov %%eax,%%cr0;"
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        "mov %%eax, %%cr0\n"
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        :
-
 
78
        :
-
 
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        :"%eax"
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        ::: "%eax"
80
    );
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    );
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}
80
}
82
 
81
 
83
void fpu_enable(void)
82
void fpu_enable(void)
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{
83
{
85
    asm volatile (
84
    asm volatile (
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        "mov %%cr0,%%eax;"
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        "mov %%cr0, %%eax\n"
87
        "and $0xffFFffF7,%%eax;"
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        "and $0xffFFffF7, %%eax\n"
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        "mov %%eax,%%cr0;"
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        "mov %%eax,%%cr0\n"
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        :
-
 
90
        :
-
 
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        :"%eax"
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        ::: "%eax"
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    ); 
89
    );
93
}
90
}
94
 
91
 
95
void cpu_arch_init(void)
92
void cpu_arch_init(void)
96
{
93
{
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    cpuid_feature_info fi;
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    cpuid_feature_info fi;
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    cpu_info_t info;
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    cpu_info_t info;
100
    uint32_t help = 0;
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    uint32_t help = 0;
101
   
98
   
102
    CPU->arch.tss = tss_p;
99
    CPU->arch.tss = tss_p;
103
    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
100
    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
104
 
101
   
105
    CPU->fpu_owner = NULL;
102
    CPU->fpu_owner = NULL;
106
 
103
   
107
    cpuid(1, &info);
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    cpuid(1, &info);
108
 
105
   
109
    fi.word = info.cpuid_edx;
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    fi.word = info.cpuid_edx;
110
    efi.word = info.cpuid_ecx;
107
    efi.word = info.cpuid_ecx;
111
   
108
   
112
    if (fi.bits.fxsr)
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    if (fi.bits.fxsr)
113
        fpu_fxsr();
110
        fpu_fxsr();
114
    else
111
    else
115
        fpu_fsr(); 
112
        fpu_fsr();
116
   
113
   
117
    if (fi.bits.sse) {
114
    if (fi.bits.sse) {
118
        asm volatile (
115
        asm volatile (
119
            "mov %%cr4,%0\n"
116
            "mov %%cr4, %[help]\n"
120
            "or %1,%0\n"
117
            "or %[mask], %[help]\n"
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            "mov %0,%%cr4\n"
118
            "mov %[help], %%cr4\n"
122
            : "+r" (help)
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            : [help] "+r" (help)
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            : "i" (CR4_OSFXSR_MASK|(1<<10))
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            : [mask] "i" (CR4_OSFXSR_MASK | (1 << 10))
124
        );
121
        );
125
    }
122
    }
-
 
123
   
-
 
124
    /* Setup fast SYSENTER/SYSEXIT syscalls */
-
 
125
    syscall_setup_cpu();
126
}
126
}
127
 
127
 
128
void cpu_identify(void)
128
void cpu_identify(void)
129
{
129
{
130
    cpu_info_t info;
130
    cpu_info_t info;
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134
        cpuid(0, &info);
134
        cpuid(0, &info);
135
 
135
 
136
        /*
136
        /*
137
         * Check for AMD processor.
137
         * Check for AMD processor.
138
         */
138
         */
-
 
139
        if ((info.cpuid_ebx == AMD_CPUID_EBX)
139
        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
140
            && (info.cpuid_ecx == AMD_CPUID_ECX)
-
 
141
            && (info.cpuid_edx == AMD_CPUID_EDX))
140
            CPU->arch.vendor = VendorAMD;
142
            CPU->arch.vendor = VendorAMD;
141
        }
143
       
142
 
-
 
143
        /*
144
        /*
144
         * Check for Intel processor.
145
         * Check for Intel processor.
145
         */    
146
         */    
-
 
147
        if ((info.cpuid_ebx == INTEL_CPUID_EBX)
146
        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
148
            && (info.cpuid_ecx == INTEL_CPUID_ECX)
-
 
149
            && (info.cpuid_edx == INTEL_CPUID_EDX))
147
            CPU->arch.vendor = VendorIntel;
150
            CPU->arch.vendor = VendorIntel;
148
        }
151
       
149
               
-
 
150
        cpuid(1, &info);
152
        cpuid(1, &info);
151
        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
153
        CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
152
        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
154
        CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;
153
        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;                      
155
        CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f;                     
154
    }
156
    }
155
}
157
}
156
 
158
 
157
void cpu_print_report(cpu_t* m)
159
void cpu_print_report(cpu_t* cpu)
158
{
160
{
159
    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
161
    printf("cpu%u: (%s family=%u model=%u stepping=%u) %" PRIu16 " MHz\n",
160
        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
162
        cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family,
161
        m->frequency_mhz);
163
        cpu->arch.model, cpu->arch.stepping, cpu->frequency_mhz);
162
}
164
}
163
 
165
 
164
/** @}
166
/** @}
165
 */
167
 */