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Rev 3022 Rev 4055
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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#define IREGISTER_SPACE 120
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#define IREGISTER_SPACE	72 
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#define IOFFSET_RAX 0x0
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#define IOFFSET_RAX	0x0
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#define IOFFSET_RBX 0x8
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#define IOFFSET_RCX	0x8
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#define IOFFSET_RCX 0x10
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#define IOFFSET_RDX	0x10
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#define IOFFSET_RDX 0x18
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#define IOFFSET_RSI	0x18
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#define IOFFSET_RSI 0x20
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#define IOFFSET_RDI	0x20
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#define IOFFSET_RDI 0x28
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#define IOFFSET_R8	0x28
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#define IOFFSET_R8 0x30
-
 
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#define IOFFSET_R9 0x38
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#define IOFFSET_R9	0x30
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#define IOFFSET_R10 0x40
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#define IOFFSET_R10	0x38
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#define IOFFSET_R11 0x48
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#define IOFFSET_R11	0x40
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#define IOFFSET_R12 0x50
-
 
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#define IOFFSET_R13 0x58
-
 
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#define IOFFSET_R14 0x60
-
 
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#define IOFFSET_R15 0x68
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#define IOFFSET_RBP 0x70
-
 
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#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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# and 1 means interrupt with error word
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# and 1 means interrupt with error word
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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.global cpuid
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.global cpuid
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.global has_cpuid
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.global has_cpuid
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.global get_cycle
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.global get_cycle
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.global read_efer_flag
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.global read_efer_flag
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.global set_efer_flag
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.global set_efer_flag
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.global memsetb
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.global memsetw
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.global memcpy
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.global memcpy
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.global memcpy_from_uspace
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.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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-
 
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# Wrapper for generic memsetb
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memsetb:
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	jmp _memsetb
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# Wrapper for generic memsetw
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memsetw:
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	jmp _memsetw
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#define MEMCPY_DST	%rdi
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#define MEMCPY_DST	%rdi
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#define MEMCPY_SRC	%rsi
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#define MEMCPY_SRC	%rsi
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#define MEMCPY_SIZE	%rdx
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#define MEMCPY_SIZE	%rdx
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/**
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/**
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 *
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 *
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 * @param MEMCPY_DST	Destination address.
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 * @param MEMCPY_DST	Destination address.
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 * @param MEMCPY_SRC	Source address.
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 * @param MEMCPY_SRC	Source address.
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 * @param MEMCPY_SIZE	Number of bytes to copy.
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 * @param MEMCPY_SIZE	Number of bytes to copy.
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 *
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 *
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 * @retrun MEMCPY_SRC on success, 0 on failure.
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 * @retrun MEMCPY_DST on success, 0 on failure.
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 */
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 */
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memcpy:
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memcpy:
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memcpy_from_uspace:
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memcpy_from_uspace:
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memcpy_to_uspace:
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memcpy_to_uspace:
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	movq MEMCPY_SRC, %rax
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	movq MEMCPY_DST, %rax
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	movq MEMCPY_SIZE, %rcx
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	movq MEMCPY_SIZE, %rcx
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	shrq $3, %rcx			/* size / 8 */
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	shrq $3, %rcx			/* size / 8 */
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	rep movsq			/* copy as much as possible word by word */
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	rep movsq			/* copy as much as possible word by word */
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read_efer_flag:	
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read_efer_flag:	
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	movq $0xc0000080, %rcx
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	movq $0xc0000080, %rcx
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	rdmsr
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	rdmsr
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	ret 		
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	ret 		
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# Push all general purpose registers on stack except %rbp, %rsp
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# Push all volatile general purpose registers on stack
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.macro save_all_gpr
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.macro save_all_gpr
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	movq %rax, IOFFSET_RAX(%rsp)
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	movq %rax, IOFFSET_RAX(%rsp)
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	movq %rcx, IOFFSET_RCX(%rsp)
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	movq %rcx, IOFFSET_RCX(%rsp)
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	movq %rdx, IOFFSET_RDX(%rsp)
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	movq %rdx, IOFFSET_RDX(%rsp)
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	movq %rsi, IOFFSET_RSI(%rsp)
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	movq %rsi, IOFFSET_RSI(%rsp)
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	movq %rdi, IOFFSET_RDI(%rsp)
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	movq %rdi, IOFFSET_RDI(%rsp)
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	movq %r8, IOFFSET_R8(%rsp)
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	movq %r8, IOFFSET_R8(%rsp)
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	movq %r9, IOFFSET_R9(%rsp)
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	movq %r9, IOFFSET_R9(%rsp)
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	movq %r10, IOFFSET_R10(%rsp)
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	movq %r10, IOFFSET_R10(%rsp)
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	movq %r11, IOFFSET_R11(%rsp)
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	movq %r11, IOFFSET_R11(%rsp)
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#ifdef CONFIG_DEBUG_ALLREGS	
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	movq %rbx, IOFFSET_RBX(%rsp)
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	movq %rbp, IOFFSET_RBP(%rsp)
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	movq %r12, IOFFSET_R12(%rsp)
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	movq %r13, IOFFSET_R13(%rsp)
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	movq %r14, IOFFSET_R14(%rsp)
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	movq %r15, IOFFSET_R15(%rsp)
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#endif
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.endm
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.endm
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.macro restore_all_gpr
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.macro restore_all_gpr
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	movq IOFFSET_RAX(%rsp), %rax
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	movq IOFFSET_RAX(%rsp), %rax
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	movq IOFFSET_RCX(%rsp), %rcx
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	movq IOFFSET_RCX(%rsp), %rcx
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	movq IOFFSET_RDI(%rsp), %rdi
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	movq IOFFSET_RDI(%rsp), %rdi
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	movq IOFFSET_R8(%rsp), %r8
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	movq IOFFSET_R8(%rsp), %r8
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	movq IOFFSET_R9(%rsp), %r9
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	movq IOFFSET_R9(%rsp), %r9
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	movq IOFFSET_R10(%rsp), %r10
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	movq IOFFSET_R10(%rsp), %r10
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	movq IOFFSET_R11(%rsp), %r11
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	movq IOFFSET_R11(%rsp), %r11
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#ifdef CONFIG_DEBUG_ALLREGS	
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	movq IOFFSET_RBX(%rsp), %rbx
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	movq IOFFSET_RBP(%rsp), %rbp
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	movq IOFFSET_R12(%rsp), %r12
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	movq IOFFSET_R13(%rsp), %r13
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	movq IOFFSET_R14(%rsp), %r14
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	movq IOFFSET_R15(%rsp), %r15
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#endif
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.endm
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.endm
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#ifdef CONFIG_DEBUG_ALLREGS
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# define INTERRUPT_ALIGN 256
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#else
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# define INTERRUPT_ALIGN 128
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#define INTERRUPT_ALIGN 128
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#endif
-
 
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## Declare interrupt handlers
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## Declare interrupt handlers
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#
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#
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# Declare interrupt handlers for n interrupt
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# Declare interrupt handlers for n interrupt
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# vectors starting at vector i.
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# vectors starting at vector i.