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Rev 4055 Rev 4156
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    asm volatile ("hlt\n");
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    asm volatile ("hlt\n");
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}
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}
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static inline void cpu_halt(void)
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static inline void cpu_halt(void)
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{
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{
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    asm volatile ("hlt\n");
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    asm volatile (
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        "0:\n"
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        "   hlt\n"
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        "   jmp 0b\n"
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    );
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}
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}
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/** Byte from port
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/** Byte from port
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 *
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 *
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/** Load GDTR register from memory.
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/** Load GDTR register from memory.
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 *
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 *
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 * @param gdtr_reg Address of memory from where to load GDTR.
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 * @param gdtr_reg Address of memory from where to load GDTR.
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 *
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 *
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 */
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 */
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static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
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static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
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{
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{
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    asm volatile (
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    asm volatile (
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        "lgdtq %[gdtr_reg]\n"
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        "lgdtq %[gdtr_reg]\n"
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        :: [gdtr_reg] "m" (*gdtr_reg)
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        :: [gdtr_reg] "m" (*gdtr_reg)
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    );
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    );
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/** Store GDTR register to memory.
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/** Store GDTR register to memory.
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 *
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 *
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 * @param gdtr_reg Address of memory to where to load GDTR.
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 * @param gdtr_reg Address of memory to where to load GDTR.
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 *
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 *
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 */
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 */
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static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
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static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
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{
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{
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    asm volatile (
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    asm volatile (
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        "sgdtq %[gdtr_reg]\n"
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        "sgdtq %[gdtr_reg]\n"
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        :: [gdtr_reg] "m" (*gdtr_reg)
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        :: [gdtr_reg] "m" (*gdtr_reg)
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    );
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    );
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/** Load IDTR register from memory.
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/** Load IDTR register from memory.
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 *
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 *
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 * @param idtr_reg Address of memory from where to load IDTR.
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 * @param idtr_reg Address of memory from where to load IDTR.
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 *
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 *
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 */
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 */
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static inline void idtr_load(struct ptr_16_64 *idtr_reg)
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static inline void idtr_load(ptr_16_64_t *idtr_reg)
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{
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{
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    asm volatile (
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    asm volatile (
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        "lidtq %[idtr_reg]\n"
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        "lidtq %[idtr_reg]\n"
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        :: [idtr_reg] "m" (*idtr_reg));
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        :: [idtr_reg] "m" (*idtr_reg));
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}
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}