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66 | typedef uint32_t context_id_t; |
66 | typedef uint32_t context_id_t; |
67 | 67 | ||
68 | typedef int32_t inr_t; |
68 | typedef int32_t inr_t; |
69 | typedef int32_t devno_t; |
69 | typedef int32_t devno_t; |
70 | 70 | ||
71 | - | ||
72 | /** Page table entry. |
71 | /** Page table entry. |
73 | * |
72 | * |
74 | * We have different structs for level 0 and level 1 page table entries. |
73 | * We have different structs for level 0 and level 1 page table entries. |
- | 74 | * Note: See page.h for pte_level*_t types of different levels of page table. |
|
75 | * */ |
75 | * */ |
76 | typedef struct { |
76 | typedef struct { |
77 | unsigned dummy : 32; |
77 | unsigned dummy : 32; |
78 | } pte_t; |
78 | } pte_t; |
79 | 79 | ||
80 | /** Level 0 page table entry. */ |
- | |
81 | typedef struct { |
- | |
82 | /* 01b for coarse tables, see below for details */ |
- | |
83 | unsigned descriptor_type : 2; |
- | |
84 | unsigned impl_specific : 3; |
- | |
85 | unsigned domain : 4; |
- | |
86 | unsigned should_be_zero : 1; |
- | |
87 | /* Pointer to the coarse 2nd level page table (holding entries for small (4KB) |
- | |
88 | * or large (64KB) pages. ARM also supports fine 2nd level page tables that |
- | |
89 | * may hold even tiny pages (1KB) but they are bigger (4KB per table in comparison |
- | |
90 | * with 1KB per the coarse table) |
- | |
91 | */ |
- | |
92 | unsigned coarse_table_addr : 22; |
- | |
93 | } __attribute__ ((packed)) pte_level0_t; |
- | |
94 | - | ||
95 | /** Level 1 page table entry (small (4KB) pages used) */ |
- | |
96 | typedef struct { |
- | |
97 | /* 0b10 for small pages */ |
- | |
98 | unsigned descriptor_type : 2; |
- | |
99 | unsigned bufferable : 1; |
- | |
100 | unsigned cacheable : 1; |
- | |
101 | /* access permissions for each of 4 subparts of a page |
- | |
102 | * (for each 1KB when small pages used */ |
- | |
103 | unsigned access_permission_0 : 2; |
- | |
104 | unsigned access_permission_1 : 2; |
- | |
105 | unsigned access_permission_2 : 2; |
- | |
106 | unsigned access_permission_3 : 2; |
- | |
107 | unsigned frame_base_addr : 20; |
- | |
108 | } __attribute__ ((packed)) pte_level1_t; |
- | |
109 | - | ||
110 | - | ||
111 | /* Level 1 page tables access permissions */ |
- | |
112 | - | ||
113 | /** User mode: no access, privileged mode: no access */ |
- | |
114 | #define PTE_AP_USER_NO_KERNEL_NO 0 |
- | |
115 | /** User mode: no access, privileged mode: read/write */ |
- | |
116 | #define PTE_AP_USER_NO_KERNEL_RW 1 |
- | |
117 | /** User mode: read only, privileged mode: read/write */ |
- | |
118 | #define PTE_AP_USER_RO_KERNEL_RW 2 |
- | |
119 | /// User mode: read/write, privileged mode: read/write |
- | |
120 | #define PTE_AP_USER_RW_KERNEL_RW 3 |
- | |
121 | - | ||
122 | - | ||
123 | /* pte_level0_t and pte_level1_t descriptor_type flags */ |
- | |
124 | - | ||
125 | /** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */ |
- | |
126 | #define PTE_DESCRIPTOR_NOT_PRESENT 0 |
- | |
127 | /** pte_level0_t coarse page table flag (used in descriptor_type) */ |
- | |
128 | #define PTE_DESCRIPTOR_COARSE_TABLE 1 |
- | |
129 | /** pte_level1_t small page table flag (used in descriptor type) */ |
- | |
130 | #define PTE_DESCRIPTOR_SMALL_PAGE 2 |
- | |
131 | - | ||
132 | - | ||
133 | #endif |
80 | #endif |
134 | 81 | ||
135 | /** @} |
82 | /** @} |
136 | */ |
83 | */ |