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/*
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/*
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 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
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 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32mm
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/** @addtogroup arm32mm
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *  @brief Page fault related declarations.
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 *  @brief Page fault related declarations.
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 */
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 */
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#ifndef KERN_arm32_PAGE_FAULT_H_
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#ifndef KERN_arm32_PAGE_FAULT_H_
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#define KERN_arm32_PAGE_FAULT_H_
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#define KERN_arm32_PAGE_FAULT_H_
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#include <arch/types.h>
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#include <arch/types.h>
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/** Decribes CP15 "fault status register" (FSR). */
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/** Decribes CP15 "fault status register" (FSR). */
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typedef struct {
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typedef struct {
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    unsigned status           : 3;
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    unsigned status           : 3;
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    unsigned domain           : 4;
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    unsigned domain           : 4;
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    unsigned zero             : 1;
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    unsigned zero             : 1;
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    unsigned should_be_zero   : 24;
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    unsigned should_be_zero   : 24;
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} ATTRIBUTE_PACKED fault_status_t;
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} ATTRIBUTE_PACKED fault_status_t;
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/** Help union used for casting integer value into #fault_status_t. */
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/** Help union used for casting integer value into #fault_status_t. */
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typedef union {
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typedef union {
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    fault_status_t    fs;
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    fault_status_t fs;
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    uint32_t          dummy;
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    uint32_t dummy;
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} fault_status_union_t;
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} fault_status_union_t;
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/** Simplified description of instruction code.
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/** Simplified description of instruction code.
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 *
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 *
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 * @note Used for recognizing memory access instructions.
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 * @note Used for recognizing memory access instructions.
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 * @see ARM architecture reference (chapter 3.1)
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 * @see ARM architecture reference (chapter 3.1)
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 */
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 */
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typedef struct {
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typedef struct {
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    unsigned dummy1        : 4;
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    unsigned dummy1        : 4;
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    unsigned bit4          : 1;
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    unsigned bit4          : 1;
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    unsigned bits567       : 3;
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    unsigned bits567       : 3;
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    unsigned dummy         : 12;
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    unsigned dummy         : 12;
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    unsigned access        : 1;
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    unsigned access        : 1;
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    unsigned opcode        : 4;
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    unsigned opcode        : 4;
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    unsigned type          : 3;
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    unsigned type          : 3;
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    unsigned condition     : 4;
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    unsigned condition     : 4;
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} ATTRIBUTE_PACKED instruction_t;
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} ATTRIBUTE_PACKED instruction_t;
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/** Help union used for casting pc register (uint_32_t) value into
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/** Help union used for casting pc register (uint_32_t) value into
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 *  #instruction_t pointer.
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 *  #instruction_t pointer.
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 */
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 */
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typedef union {
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typedef union {
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    instruction_t   *instr;
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    instruction_t *instr;
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    uint32_t         pc;
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    uint32_t pc;
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} instruction_union_t;
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} instruction_union_t;
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-
 
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extern void prefetch_abort(int n, istate_t *istate);
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extern void prefetch_abort(int n, istate_t *istate);
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extern void data_abort(int n, istate_t *istate);
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extern void data_abort(int n, istate_t *istate);
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-
 
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */
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-