Subversion Repositories HelenOS

Rev

Rev 2278 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 2278 Rev 2329
Line 99... Line 99...
99 
#define PTE_GET_FRAME_ARCH(pte)         ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH)
 99 
#define PTE_GET_FRAME_ARCH(pte)         ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH)
100 
/* pte should point into ptl3 */
 100 
/* pte should point into ptl3 */
101 
#define PTE_WRITABLE_ARCH(pte)          ( ((pte_level1_t *)(pte))->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW )
 101 
#define PTE_WRITABLE_ARCH(pte)          ( ((pte_level1_t *)(pte))->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW )
102 
#define PTE_EXECUTABLE_ARCH(pte)        1
 102 
#define PTE_EXECUTABLE_ARCH(pte)        1
103 
 
 103 
 
- 
 
 104 
 
104 
#ifndef __ASM__
 105 
#ifndef __ASM__
105 
 
 106 
 
106 
/** Level 0 page table entry. */
 107 
/** Level 0 page table entry. */
107 
typedef struct {
 108 
typedef struct {
108 
    /* 01b for coarse tables, see below for details */
 109 
    /* 01b for coarse tables, see below for details */
Line 116... Line 117...
116 
     * with 1KB per the coarse table)
 117 
     * with 1KB per the coarse table)
117 
    */
 118 
    */
118 
    unsigned coarse_table_addr   : 22;
 119 
    unsigned coarse_table_addr   : 22;
119 
} __attribute__ ((packed)) pte_level0_t;
 120 
} __attribute__ ((packed)) pte_level0_t;
120 
 
 121 
 
- 
 
 122 
 
121 
/** Level 1 page table entry (small (4KB) pages used) */
 123 
/** Level 1 page table entry (small (4KB) pages used). */
122 
typedef struct {
 124 
typedef struct {
123 
    /* 0b10 for small pages */
 125 
    /* 0b10 for small pages */
124 
    unsigned descriptor_type     : 2;
 126 
    unsigned descriptor_type     : 2;
125 
    unsigned bufferable          : 1;
 127 
    unsigned bufferable          : 1;
126 
    unsigned cacheable           : 1;
 128 
    unsigned cacheable           : 1;
Line 134... Line 136...
134 
} __attribute__ ((packed)) pte_level1_t;
 136 
} __attribute__ ((packed)) pte_level1_t;
135 
 
 137 
 
136 
 
 138 
 
137 
/* Level 1 page tables access permissions */
 139 
/* Level 1 page tables access permissions */
138 
 
 140 
 
139 
/** User mode: no access, privileged mode: no access */
 141 
/** User mode: no access, privileged mode: no access. */
140 
#define PTE_AP_USER_NO_KERNEL_NO 0
 142 
#define PTE_AP_USER_NO_KERNEL_NO 0
141 
/** User mode: no access, privileged mode: read/write */
 143 
/** User mode: no access, privileged mode: read/write. */
142 
#define PTE_AP_USER_NO_KERNEL_RW 1
 144 
#define PTE_AP_USER_NO_KERNEL_RW 1
143 
/** User mode: read only, privileged mode: read/write */
 145 
/** User mode: read only, privileged mode: read/write. */
144 
#define PTE_AP_USER_RO_KERNEL_RW 2
 146 
#define PTE_AP_USER_RO_KERNEL_RW 2
145 
/** User mode: read/write, privileged mode: read/write */
 147 
/** User mode: read/write, privileged mode: read/write. */
146 
#define PTE_AP_USER_RW_KERNEL_RW 3
 148 
#define PTE_AP_USER_RW_KERNEL_RW 3
147 
 
 149 
 
148 
 
 150 
 
149 
/* pte_level0_t and pte_level1_t descriptor_type flags */
 151 
/* pte_level0_t and pte_level1_t descriptor_type flags */
150 
 
 152 
 
151 
/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */
 153 
/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */
152 
#define PTE_DESCRIPTOR_NOT_PRESENT  0
 154 
#define PTE_DESCRIPTOR_NOT_PRESENT  0
153 
/** pte_level0_t coarse page table flag (used in descriptor_type) */
 155 
/** pte_level0_t coarse page table flag (used in descriptor_type). */
154 
#define PTE_DESCRIPTOR_COARSE_TABLE 1
 156 
#define PTE_DESCRIPTOR_COARSE_TABLE 1
155 
/** pte_level1_t small page table flag (used in descriptor type) */
 157 
/** pte_level1_t small page table flag (used in descriptor type). */
156 
#define PTE_DESCRIPTOR_SMALL_PAGE   2
 158 
#define PTE_DESCRIPTOR_SMALL_PAGE   2
157 
 
 159 
 
158 
 
 160 
 
159 
/**
 - 
 
160 
 * Sets the address of level 0 page table.
 161 
/** Sets the address of level 0 page table.
161 
 *
 162 
 *
162 
 * \param pt    pointer to the page table to set
 163 
 * @param pt    Pointer to the page table to set.
163 
 */  
 164 
 */  
164 
static inline void set_ptl0_addr( pte_level0_t* pt)
 165 
static inline void set_ptl0_addr( pte_level0_t* pt)
165 
{
 166 
{
166 
    asm volatile (
 167 
    asm volatile (
167 
        "mcr p15, 0, %0, c2, c0, 0 \n"
 168 
        "mcr p15, 0, %0, c2, c0, 0 \n"
168 
        :
 169 
        :
169 
        : "r"(pt)
 170 
        : "r"(pt)
170 
    );
 171 
    );
171 
}
 172 
}
172 
 
 173 
 
- 
 
 174 
 
173 
/** Returns level 0 page table entry flags.
 175 
/** Returns level 0 page table entry flags.
174 
 *
 176 
 *
175 
 *  \param pt     level 0 page table
 177 
 *  @param pt     Level 0 page table.
176 
 *  \param i      index of the entry to return
 178 
 *  @param i      Index of the entry to return.
177 
 */
 179 
 */
178 
static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
 180 
static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
179 
{
 181 
{
180 
    pte_level0_t *p = &pt[i];
 182 
    pte_level0_t *p = &pt[i];
181 
 
 183 
 
Line 187... Line 189...
187 
        ( 1 << PAGE_EXEC_SHIFT )  |
 189 
        ( 1 << PAGE_EXEC_SHIFT )  |
188 
        ( 1 << PAGE_CACHEABLE_SHIFT  )
 190 
        ( 1 << PAGE_CACHEABLE_SHIFT  )
189 
    ;
 191 
    ;
190 
}
 192 
}
191 
 
 193 
 
- 
 
 194 
 
192 
/** Returns level 1 page table entry flags.
 195 
/** Returns level 1 page table entry flags.
193 
 *
 196 
 *
194 
 *  \param pt     level 1 page table
 197 
 *  @param pt     Level 1 page table.
195 
 *  \param i      index of the entry to return
 198 
 *  @param i      Index of the entry to return.
196 
 */
 199 
 */
197 
static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
 200 
static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
198 
{
 201 
{
199 
    pte_level1_t *p = &pt[i];
 202 
    pte_level1_t *p = &pt[i];
200 
 
 203 
 
Line 209... Line 212...
209 
        ( 1 << PAGE_EXEC_SHIFT ) |
 212 
        ( 1 << PAGE_EXEC_SHIFT ) |
210 
        ( p->bufferable << PAGE_CACHEABLE )
 213 
        ( p->bufferable << PAGE_CACHEABLE )
211 
    ;
 214 
    ;
212 
}
 215 
}
213 
 
 216 
 
- 
 
 217 
 
214 
/** Sets flags of level 0 page table entry.
 218 
/** Sets flags of level 0 page table entry.
215 
 *
 219 
 *
216 
 *  \param pt     level 0 page table
 220 
 *  @param pt     level 0 page table
217 
 *  \param i      index of the entry to be changed
 221 
 *  @param i      index of the entry to be changed
218 
 *  \param flags  new flags
 222 
 *  @param flags  new flags
219 
 */
 223 
 */
220 
static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)
 224 
static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)
221 
{
 225 
{
222 
    pte_level0_t *p = &pt[i];
 226 
    pte_level0_t *p = &pt[i];
223 
 
 227 
 
Line 229... Line 233...
229 
        p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
 233 
        p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
230 
        p->should_be_zero  = 0;
 234 
        p->should_be_zero  = 0;
231 
    }
 235 
    }
232 
}
 236 
}
233 
 
 237 
 
- 
 
 238 
 
234 
/** Sets flags of level 1 page table entry.
 239 
/** Sets flags of level 1 page table entry.
235 
 *
 240 
 *
236 
 *  We use same access rights for the whole page. When page is not preset we
 241 
 *  We use same access rights for the whole page. When page is not preset we
237 
 *  store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct
 242 
 *  store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct
238 
 *  page entry, see #PAGE_VALID_ARCH).
 243 
 *  page entry, see #PAGE_VALID_ARCH).
239 
 *
 244 
 *
240 
 *  \param pt     level 1 page table
 245 
 *  @param pt     Level 1 page table.
241 
 *  \param i      index of the entry to be changed
 246 
 *  @param i      Index of the entry to be changed.
242 
 *  \param flags  new flags
 247 
 *  @param flags  New flags.
243 
 */  
 248 
 */  
244 
static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags)
 249 
static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags)
245 
{
 250 
{
246 
    pte_level1_t *p = &pt[i];
 251 
    pte_level1_t *p = &pt[i];
247 
   
 252