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Rev 2259 | Rev 2263 | ||
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Line 91... | Line 91... | ||
91 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
91 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
92 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
92 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
93 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x)) |
93 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x)) |
94 | 94 | ||
95 | #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) |
95 | #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) |
96 | // TODO: ?? != 0 |
- | |
97 | #define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type != 0 ) |
96 | #define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type != 0 ) |
98 | 97 | ||
99 | /* pte should point into ptl3 */ |
98 | /* pte should point into ptl3 */ |
100 | #define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) |
99 | #define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) |
101 | /* pte should point into ptl3 */ |
100 | /* pte should point into ptl3 */ |
Line 117... | Line 116... | ||
117 | : "r"(pt) |
116 | : "r"(pt) |
118 | ); |
117 | ); |
119 | 118 | ||
120 | } |
119 | } |
121 | 120 | ||
122 | /** |
- | |
123 | * Returns level 0 page table entry flags. |
121 | /** Returns level 0 page table entry flags. |
124 | * |
122 | * |
125 | * \param pt level 0 page table |
123 | * \param pt level 0 page table |
126 | * \param i index of the entry to return |
124 | * \param i index of the entry to return |
127 | */ |
125 | */ |
128 | static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i) |
126 | static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i) |
129 | { |
127 | { |
130 | pte_level0_t *p = &pt[i]; |
128 | pte_level0_t *p = &pt[i]; |
131 | 129 | ||
Line 137... | Line 135... | ||
137 | ( 1 << PAGE_EXEC_SHIFT ) | |
135 | ( 1 << PAGE_EXEC_SHIFT ) | |
138 | ( 1 << PAGE_CACHEABLE_SHIFT ) |
136 | ( 1 << PAGE_CACHEABLE_SHIFT ) |
139 | ; |
137 | ; |
140 | } |
138 | } |
141 | 139 | ||
142 | /** |
- | |
143 | * Returns level 1 page table entry flags. |
140 | /** Returns level 1 page table entry flags. |
144 | * |
141 | * |
145 | * \param pt level 1 page table |
142 | * \param pt level 1 page table |
146 | * \param i index of the entry to return |
143 | * \param i index of the entry to return |
147 | */ |
144 | */ |
148 | static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i) |
145 | static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i) |
149 | { |
146 | { |
150 | pte_level1_t *p = &pt[i]; |
147 | pte_level1_t *p = &pt[i]; |
151 | 148 | ||
Line 160... | Line 157... | ||
160 | ( 1 << PAGE_EXEC_SHIFT ) | |
157 | ( 1 << PAGE_EXEC_SHIFT ) | |
161 | ( p->bufferable << PAGE_CACHEABLE ) |
158 | ( p->bufferable << PAGE_CACHEABLE ) |
162 | ; |
159 | ; |
163 | } |
160 | } |
164 | 161 | ||
165 | /** |
- | |
166 | * Sets flags of level 0 page table entry. |
162 | /** Sets flags of level 0 page table entry. |
167 | * |
- | |
168 | * \param pt level 0 page table |
- | |
169 | * \param i index of the entry to be changed |
- | |
170 | * \param flags new flags |
- | |
171 | * |
163 | * |
172 | * TODO: why should_be_zero set to 1? |
164 | * \param pt level 0 page table |
- | 165 | * \param i index of the entry to be changed |
|
- | 166 | * \param flags new flags |
|
173 | */ |
167 | */ |
174 | static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags) |
168 | static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags) |
175 | { |
169 | { |
176 | pte_level0_t *p = &pt[i]; |
170 | pte_level0_t *p = &pt[i]; |
177 | 171 | ||
178 | if (flags & PAGE_NOT_PRESENT) { |
172 | if (flags & PAGE_NOT_PRESENT) { |
179 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
173 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
- | 174 | // ensures that the entry will be recognized as valid when PTE_VALID_ARCH applied |
|
180 | p->should_be_zero = 1; |
175 | p->should_be_zero = 1; |
181 | // TODO: remove in final version |
- | |
182 | // For Michal: Have to be here ... ensures this entry contains at least 1 non zero bit |
- | |
183 | // all zero bits signals PTE_VALID_ARCH , it's different from not_present |
- | |
184 | } else { |
176 | } else { |
185 | p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
177 | p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
186 | p->should_be_zero = 0; |
178 | p->should_be_zero = 0; |
187 | } |
179 | } |
188 | } |
180 | } |
189 | 181 | ||
190 | /** |
- | |
191 | * Sets flags of level 1 page table entry. |
182 | /** Sets flags of level 1 page table entry. |
192 | * |
183 | * |
193 | * We use same access rights for the whole page. When page is not preset then |
184 | * We use same access rights for the whole page. When page is not preset we |
194 | * store 1 in acess_rigts_3. |
185 | * store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct |
195 | * TODO: why access_right_3? |
186 | * page entry, see #PAGE_VALID_ARCH). |
196 | * |
187 | * |
197 | * \param pt level 1 page table |
188 | * \param pt level 1 page table |
198 | * \param i index of the entry to be changed |
189 | * \param i index of the entry to be changed |
199 | * \param flags new flags |
190 | * \param flags new flags |
200 | */ |
191 | */ |
201 | static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags) |
192 | static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags) |
202 | { |
193 | { |
203 | pte_level1_t *p = &pt[i]; |
194 | pte_level1_t *p = &pt[i]; |
204 | 195 |