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Line 67... | Line 67... | ||
67 | #define PTL3_SIZE_ARCH ONE_FRAME |
67 | #define PTL3_SIZE_ARCH ONE_FRAME |
68 | 68 | ||
69 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) |
69 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) |
70 | #define PTL1_INDEX_ARCH(vaddr) 0 |
70 | #define PTL1_INDEX_ARCH(vaddr) 0 |
71 | #define PTL2_INDEX_ARCH(vaddr) 0 |
71 | #define PTL2_INDEX_ARCH(vaddr) 0 |
72 | /* TODO: ?? 0xfff or 0x0ff */ |
- | |
73 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0xfff) |
72 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) |
74 | 73 | ||
75 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)( (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 )) |
74 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)( (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 )) |
76 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
75 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
77 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
76 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
78 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)( (((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 )) |
77 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)( (((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 )) |
Line 98... | Line 97... | ||
98 | #define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type != 0 ) |
97 | #define PTE_PRESENT_ARCH(pte) ( ((pte_level0_t *)(pte))->descriptor_type != 0 ) |
99 | 98 | ||
100 | /* pte should point into ptl3 */ |
99 | /* pte should point into ptl3 */ |
101 | #define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) |
100 | #define PTE_GET_FRAME_ARCH(pte) ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) |
102 | /* pte should point into ptl3 */ |
101 | /* pte should point into ptl3 */ |
103 | #define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw ) |
102 | #define PTE_WRITABLE_ARCH(pte) ( ((pte_level1_t *)(pte))->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW ) |
104 | 103 | ||
105 | #define PTE_EXECUTABLE_ARCH(pte) 1 |
104 | #define PTE_EXECUTABLE_ARCH(pte) 1 |
106 | 105 | ||
107 | #ifndef __ASM__ |
106 | #ifndef __ASM__ |
108 | 107 | ||
Line 128... | Line 127... | ||
128 | */ |
127 | */ |
129 | static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i) |
128 | static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i) |
130 | { |
129 | { |
131 | pte_level0_t *p = &pt[i]; |
130 | pte_level0_t *p = &pt[i]; |
132 | 131 | ||
133 | return ( |
132 | return |
134 | ( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT | |
133 | ( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT ) | |
135 | ( 1 << PAGE_USER_SHIFT ) | |
134 | ( 1 << PAGE_USER_SHIFT ) | |
136 | ( 1 << PAGE_READ_SHIFT ) | |
135 | ( 1 << PAGE_READ_SHIFT ) | |
137 | ( 1 << PAGE_WRITE_SHIFT ) | |
136 | ( 1 << PAGE_WRITE_SHIFT ) | |
138 | ( 1 << PAGE_EXEC_SHIFT ) | |
137 | ( 1 << PAGE_EXEC_SHIFT ) | |
139 | ( 1 << PAGE_CACHEABLE_SHIFT ) |
138 | ( 1 << PAGE_CACHEABLE_SHIFT ) |
140 | ); |
139 | ; |
141 | } |
140 | } |
142 | 141 | ||
143 | /** |
142 | /** |
144 | * Returns level 1 page table entry flags. |
143 | * Returns level 1 page table entry flags. |
145 | * |
144 | * |
Line 148... | Line 147... | ||
148 | */ |
147 | */ |
149 | static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i) |
148 | static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i) |
150 | { |
149 | { |
151 | pte_level1_t *p = &pt[i]; |
150 | pte_level1_t *p = &pt[i]; |
152 | 151 | ||
153 | return ( |
152 | return |
154 | ( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT | |
153 | ( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | |
155 | ( (p->access_permission_0 == pte_ap_user_ro_kernel_rw) << PAGE_READ_SHIFT ) | |
154 | ( (p->access_permission_0 == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT ) | |
156 | ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_READ_SHIFT ) | |
155 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT ) | |
157 | ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_WRITE_SHIFT ) | |
156 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT ) | |
158 | ( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT ) | |
157 | ( (p->access_permission_0 != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT ) | |
159 | ( 1 << PAGE_EXEC_SHIFT ) | |
158 | ( 1 << PAGE_EXEC_SHIFT ) | |
160 | ( p->bufferable << PAGE_CACHEABLE ) |
159 | ( p->bufferable << PAGE_CACHEABLE ) |
161 | ); |
160 | ; |
162 | } |
161 | } |
163 | 162 | ||
164 | /** |
163 | /** |
165 | * Sets flags of level 0 page table entry. |
164 | * Sets flags of level 0 page table entry. |
166 | * |
165 | * |
Line 171... | Line 170... | ||
171 | * TODO: why should_be_zero set to 1? |
170 | * TODO: why should_be_zero set to 1? |
172 | */ |
171 | */ |
173 | static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags) |
172 | static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags) |
174 | { |
173 | { |
175 | pte_level0_t *p = &pt[i]; |
174 | pte_level0_t *p = &pt[i]; |
176 | 175 | ||
177 | if (flags & PAGE_NOT_PRESENT) { |
176 | if (flags & PAGE_NOT_PRESENT) { |
178 | p->descriptor_type = pte_descriptor_not_preset; |
177 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
179 | p->should_be_zero = 1; |
178 | // p->should_be_zero = 1; |
180 | } else { |
179 | } else { |
181 | p->descriptor_type = pte_descriptor_coarse_table; |
180 | p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
182 | p->should_be_zero = 0; |
181 | // p->should_be_zero = 0; |
183 | } |
182 | } |
184 | } |
183 | } |
185 | 184 | ||
186 | /** |
185 | /** |
187 | * Sets flags of level 1 page table entry. |
186 | * Sets flags of level 1 page table entry. |
Line 197... | Line 196... | ||
197 | static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags) |
196 | static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags) |
198 | { |
197 | { |
199 | pte_level1_t *p = &pt[i]; |
198 | pte_level1_t *p = &pt[i]; |
200 | 199 | ||
201 | if (flags & PAGE_NOT_PRESENT) { |
200 | if (flags & PAGE_NOT_PRESENT) { |
202 | p->descriptor_type = pte_descriptor_not_preset; |
201 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
203 | p->access_permission_3 = 1; |
202 | // p->access_permission_3 = 1; |
204 | } else { |
203 | } else { |
205 | p->descriptor_type = pte_descriptor_small_page; |
204 | p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; |
206 | p->access_permission_3 = p->access_permission_0; |
205 | // p->access_permission_3 = p->access_permission_0; |
207 | } |
206 | } |
208 | 207 | ||
209 | p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; |
208 | p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; |
210 | 209 | ||
211 | /* default access permission */ |
210 | /* default access permission */ |
212 | p->access_permission_0 = p->access_permission_1 = |
211 | p->access_permission_0 = p->access_permission_1 = |
213 | p->access_permission_2 = p->access_permission_3 = pte_ap_user_no_kernel_rw; |
212 | p->access_permission_2 = p->access_permission_3 = PTE_AP_USER_NO_KERNEL_RW; |
214 | 213 | ||
215 | if (flags & PAGE_USER) { |
214 | if (flags & PAGE_USER) { |
216 | if (flags & PAGE_READ) { |
215 | if (flags & PAGE_READ) { |
217 | p->access_permission_0 = p->access_permission_1 = |
216 | p->access_permission_0 = p->access_permission_1 = |
218 | p->access_permission_2 = p->access_permission_3 = |
217 | p->access_permission_2 = p->access_permission_3 = |
219 | pte_ap_user_ro_kernel_rw; |
218 | PTE_AP_USER_RO_KERNEL_RW; |
220 | } |
219 | } |
221 | if (flags & PAGE_WRITE) { |
220 | if (flags & PAGE_WRITE) { |
222 | p->access_permission_0 = p->access_permission_1 = |
221 | p->access_permission_0 = p->access_permission_1 = |
223 | p->access_permission_2 = p->access_permission_3 = |
222 | p->access_permission_2 = p->access_permission_3 = |
224 | pte_ap_user_rw_kernel_rw; |
223 | PTE_AP_USER_RW_KERNEL_RW; |
225 | } |
224 | } |
226 | } |
225 | } |
227 | } |
226 | } |
228 | 227 | ||
229 | extern void page_arch_init(void); |
228 | extern void page_arch_init(void); |