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Rev 2258 | Rev 2259 | ||
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Line 152... | Line 152... | ||
152 | return |
152 | return |
153 | ( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | |
153 | ( (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | |
154 | ( (p->access_permission_0 == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT ) | |
154 | ( (p->access_permission_0 == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT ) | |
155 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT ) | |
155 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT ) | |
156 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT ) | |
156 | ( (p->access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT ) | |
157 | ( (p->access_permission_0 != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT ) | |
157 | ( (p->access_permission_0 != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT ) | |
- | 158 | ( (p->access_permission_0 == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT ) | |
|
- | 159 | ( (p->access_permission_0 == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT ) | |
|
158 | ( 1 << PAGE_EXEC_SHIFT ) | |
160 | ( 1 << PAGE_EXEC_SHIFT ) | |
159 | ( p->bufferable << PAGE_CACHEABLE ) |
161 | ( p->bufferable << PAGE_CACHEABLE ) |
160 | ; |
162 | ; |
161 | } |
163 | } |
162 | 164 | ||
Line 173... | Line 175... | ||
173 | { |
175 | { |
174 | pte_level0_t *p = &pt[i]; |
176 | pte_level0_t *p = &pt[i]; |
175 | 177 | ||
176 | if (flags & PAGE_NOT_PRESENT) { |
178 | if (flags & PAGE_NOT_PRESENT) { |
177 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
179 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
178 | // p->should_be_zero = 1; |
180 | p->should_be_zero = 1; |
- | 181 | // TODO: remove in final version |
|
- | 182 | // For Michal: Have to be here ... ensures this entry contains at least 1 non zero bit |
|
- | 183 | // all zero bits signals PTE_VALID_ARCH , it's different from not_present |
|
179 | } else { |
184 | } else { |
180 | p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
185 | p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; |
181 | // p->should_be_zero = 0; |
186 | p->should_be_zero = 0; |
182 | } |
187 | } |
183 | } |
188 | } |
184 | 189 | ||
185 | /** |
190 | /** |
186 | * Sets flags of level 1 page table entry. |
191 | * Sets flags of level 1 page table entry. |
Line 197... | Line 202... | ||
197 | { |
202 | { |
198 | pte_level1_t *p = &pt[i]; |
203 | pte_level1_t *p = &pt[i]; |
199 | 204 | ||
200 | if (flags & PAGE_NOT_PRESENT) { |
205 | if (flags & PAGE_NOT_PRESENT) { |
201 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
206 | p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; |
202 | // p->access_permission_3 = 1; |
207 | p->access_permission_3 = 1; |
203 | } else { |
208 | } else { |
204 | p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; |
209 | p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; |
205 | // p->access_permission_3 = p->access_permission_0; |
210 | p->access_permission_3 = p->access_permission_0; |
206 | } |
211 | } |
207 | 212 | ||
208 | p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; |
213 | p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; |
209 | 214 | ||
210 | /* default access permission */ |
215 | /* default access permission */ |