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#ifndef KERN_arm32_PAGE_H_
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#ifndef KERN_arm32_PAGE_H_
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#define KERN_arm32_PAGE_H_
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#define KERN_arm32_PAGE_H_
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#include <arch/mm/frame.h>
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#include <arch/mm/frame.h>
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#include <mm/mm.h>
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#include <arch/exception.h>
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#define PAGE_WIDTH  FRAME_WIDTH
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#define PAGE_WIDTH  FRAME_WIDTH
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_COLOR_BITS 0           /* dummy */
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#define PAGE_COLOR_BITS 0           /* dummy */
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#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *)(  (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 ))
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#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *)(  (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 ))
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#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
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#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
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#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
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#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
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#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ( (uintptr_t)(((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 ))
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#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ( (uintptr_t)(((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 ))
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#define SET_PTL0_ADDRESS_ARCH(ptl0)  // TODO
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#define SET_PTL0_ADDRESS_ARCH(ptl0)         ( set_ptl0_addr((pte_level0_t *)(ptl0)) )
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#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_level0_t *)(ptl0))[(i)].coarse_table_addr = (a)>>10)
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#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_level0_t *)(ptl0))[(i)].coarse_table_addr = (a)>>10)
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#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
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#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
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#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
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#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
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#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_level1_t *)(ptl3))[(i)].frame_base_addr = (a)>>12)
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#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_level1_t *)(ptl3))[(i)].frame_base_addr = (a)>>12)
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#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i))
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#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i))
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#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
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#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
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#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
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#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
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#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i))
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#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i))
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#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i), (x))
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#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i), (x))
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#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
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#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
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#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
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#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
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#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x))
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#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x))
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#define PTE_VALID_ARCH(pte)                  (*((uint32_t *) (pte)) != 0)
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#define PTE_VALID_ARCH(pte)                 (*((uint32_t *) (pte)) != 0)
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#define PTE_PRESENT_ARCH(pte)                  ( ((pte_level0_t *)(pte))->descriptor_type )
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#define PTE_PRESENT_ARCH(pte)               ( ((pte_level0_t *)(pte))->descriptor_type )
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#define PTE_GET_FRAME_ARCH(pte)              ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH) // pte should point into ptl3
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#define PTE_GET_FRAME_ARCH(pte)             ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH)  // pte should point into ptl3
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#define PTE_WRITABLE_ARCH(pte)               ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw )  // pte should point into ptl3
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#define PTE_WRITABLE_ARCH(pte)              ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw )  // pte should point into ptl3
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#define PTE_EXECUTABLE_ARCH(pte)         1
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#define PTE_EXECUTABLE_ARCH(pte)               1
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#ifndef __ASM__
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#ifndef __ASM__
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#include <mm/mm.h>
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/** Set adress of paging level 0 table
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#include <arch/exception.h>
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 * \param pt pointer to page table to set
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 */  
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static inline void set_ptl0_addr( pte_level0_t* pt){
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    asm volatile ( "mrc p15, 0, %0, c2, c0, 0 \n"
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    :
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    : "r"(pt)
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    );
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}
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//TODO Comment: Page table structure as in other architectures
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//TODO Comment: Page table structure as in other architectures
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static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
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static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
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{
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{
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    return (
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    return (
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        ( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT |
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        ( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT |
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        ( 1 << PAGE_READ_SHIFT ) |
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        ( 1 << PAGE_READ_SHIFT ) |
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        ( 1 << PAGE_EXEC_SHIFT ) |
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        ( 1 << PAGE_EXEC_SHIFT ) |
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        ( 1 << PAGE_CACHEABLE  )
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        ( 1 << PAGE_CACHEABLE  )
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  // Alf Note: MayBe return WriteAble because level0 should use only kernel which can write
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  // Alf Note: MayBe return global flag if index i > 2048 (horni 2GB because kernel is mapped globaly)
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    );
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    );
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}
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}
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static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
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static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
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{
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{
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    return (
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    return (
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        ( p->descriptor_type != pte_descriptor_not_preset )    << PAGE_PRESENT_SHIFT |
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        ( p->descriptor_type != pte_descriptor_not_preset )    << PAGE_PRESENT_SHIFT |
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        ( (p->access_permission_0 == pte_ap_user_ro_kernel_rw) << PAGE_READ_SHIFT )  |
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        ( (p->access_permission_0 == pte_ap_user_ro_kernel_rw) << PAGE_READ_SHIFT )  |
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        ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_READ_SHIFT )  |
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        ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_READ_SHIFT )  |
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        ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_WRITE_SHIFT ) |
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        ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_WRITE_SHIFT ) |
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    ( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT )  |
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        ( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT )  |
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        ( 1 << PAGE_EXEC_SHIFT ) |
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        ( 1 << PAGE_EXEC_SHIFT ) |
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        ( p->bufferable << PAGE_CACHEABLE  )
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        ( p->bufferable << PAGE_CACHEABLE  )
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  // Alf Note: MayBe return global flag if index i > 2048 (horni 2GB because kernel is mapped globaly)
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    );
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    );
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}
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}
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{
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{
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    pte_level1_t *p = &pt[i];
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    pte_level1_t *p = &pt[i];
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    if ( flags & PAGE_NOT_PRESENT ) {
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    if ( flags & PAGE_NOT_PRESENT ) {
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      p->descriptor_type      = pte_descriptor_not_preset;
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      p->descriptor_type      = pte_descriptor_not_preset;
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      p->access_permission_3  = 1; // Ensure not all bits set to zero ... correct acess rights are stored in other 0-2 access permission entries
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      p->access_permission_3  = 1;
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    } else
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    } else
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    {
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    {
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      p->descriptor_type      = pte_descriptor_coarse_table;
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      p->descriptor_type      = pte_descriptor_coarse_table;
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      p->access_permission_3  = p->access_permission_0;
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      p->access_permission_3  = p->access_permission_0;
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    }
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    }