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/*
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/*
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 * Copyright (c) 2003-2004 Jakub Jermar
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 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32mm
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/** @addtogroup arm32boot
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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#ifndef __MM_H__
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#ifndef __MM_H__
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#define __MM_H__
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#define __MM_H__
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- 
 
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#ifndef __ASM__
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#include "types.h"
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#include "types.h"
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#endif
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#define FRAME_WIDTH                 12                  /* 4KB frames */
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#define FRAME_WIDTH                 12                  /* 4KB frames */
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#define FRAME_SIZE                  (1 << FRAME_WIDTH)
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#define FRAME_SIZE                  (1 << FRAME_WIDTH)
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#else
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#else
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#   define KA2PA(x)                 ((x) - 0x80000000)
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#   define KA2PA(x)                 ((x) - 0x80000000)
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#   define PA2KA(x)                 ((x) + 0x80000000)
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#   define PA2KA(x)                 ((x) + 0x80000000)
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#endif
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#endif
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/** Number of entries in PTL0 */
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#define PTL0_ENTRIES_ARCH               (2<<12)             /* 4096 */
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#define PTL0_ENTRIES_ARCH               (2<<12)             /* 4096 */
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#define SET_PTL0_ADDRESS_ARCH(ptl0)             ( set_ptl0_addr((pte_level0_section *)(ptl0)) )
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/** Frames per 1MB section */
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/** Frames per 1MB section */
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#define FRAMES_PER_SECTION              ( ( 1 << 20 ) / FRAME_SIZE )
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#define FRAMES_PER_SECTION              ( ( 1 << 20 ) / FRAME_SIZE )
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/** Converts adress to frame */
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/** Converts adress to frame number */
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#define ADDR2PFN( addr )                ( ((uintptr_t)(addr))>>FRAME_WIDTH )
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#define ADDR2PFN( addr )                ( ((uintptr_t)(addr))>>FRAME_WIDTH )
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/** Value of descriptor_type in page table entry that signals
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/** Descriptor type that signs "section" page table entry
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 * that this entry describe section
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 * (one-level paging with 1MB sized pages)  */  
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 */  
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#define PTE_DESCRIPTOR_SECTION              2
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#define PTE_DESCRIPTOR_SECTION              2
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/**  Rights: user-no acess, kernel-read/write */
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/** Access rights to page table: user-no access, kernel-read/write */
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#define PTE_AP_USER_NO_KERNEL_RW            1
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#define PTE_AP_USER_NO_KERNEL_RW            1
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#ifndef __ASM__
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/** Page table level 0 entry - section format */
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/** Page table level 0 entry - "section" format (one-level paging, 1MB sized
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 * pages). Used only for booting the kernel. */
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typedef struct {
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typedef struct {
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    unsigned descriptor_type     : 2; // should be 2
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    unsigned descriptor_type     : 2; // PTE_DESCRIPTOR_SECTION
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    unsigned bufferable          : 1;
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    unsigned bufferable          : 1;
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    unsigned cacheable           : 1;
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    unsigned cacheable           : 1;
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    unsigned machine_depend      : 1;
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    unsigned machine_depend      : 1;
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    unsigned domain              : 4;
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    unsigned domain              : 4;
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    unsigned should_be_zero_1    : 1;
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    unsigned should_be_zero_1    : 1;
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    unsigned should_be_zero_2    : 8;
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    unsigned should_be_zero_2    : 8;
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    unsigned section_base_addr   : 12;
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    unsigned section_base_addr   : 12;
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} __attribute__ ((packed)) pte_level0_section;
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} __attribute__ ((packed)) pte_level0_section;
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/** Set adress of paging level 0 table
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/** Sets the address of level 0 page table.
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 * \param pt pointer to page table to set
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 * \param pt pointer to the page table to set
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 */  
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 */  
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static inline void set_ptl0_addr( pte_level0_section* pt) {
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static inline void set_ptl0_address( pte_level0_section* pt) {
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    asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"
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    asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"
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    :
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    :
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    : "r"(pt)
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    : "r"(pt)
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    );
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    );
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}
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}
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/** Page table that holds 1:1 mapping for kernel starting */
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/** Page table that holds 1:1 mapping for booting the kernel. */
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extern pte_level0_section page_table[PTL0_ENTRIES_ARCH];
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extern pte_level0_section page_table[PTL0_ENTRIES_ARCH];
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/** Sets memory mapping for kernel */
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/** Sets memory mapping for kernel */
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void mm_kernel_mapping(void);
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void mm_kernel_mapping(void);
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- 
 
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#endif
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */