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- | 1 | + implement true memory barriers for all architectures |
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- | 2 | ||
1 | + implement true memory management |
3 | + implement true memory management |
2 | + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size |
4 | + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size [DONE] |
3 | + [mips] use some heuristics to get memory map and memory size |
5 | + [mips] use some heuristics to get memory map and memory size |
4 | + reimplement heap so that it can allocate/deallocate itself frames as necessary |
6 | + reimplement heap so that it can allocate/deallocate |
- | 7 | itself frames as necessary |
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5 | + provide native four-level portable page table interface |
8 | + provide native four-level portable page table interface [DONE] |
6 | + every architecture uses its native page table format |
9 | + every architecture uses its native page table format |
7 | + kernel provides unified four-level page table interface for all architectures |
10 | + kernel provides unified four-level page table interface |
- | 11 | for all architectures |
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8 | + track usage of frames containing middle-level page tables (frame leak) |
12 | + track usage of frames containing middle-level page tables |
- | 13 | (frame leak) |
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9 | 14 | ||
10 | + get user mode support for all architectures |
15 | + get user mode support for all architectures |
11 | 16 | ||
12 | + save/restore floating point context on context switch |
17 | + save/restore floating point context on context switch |
13 | + [ia32] lazy context switch using TS flag [DONE] |
18 | + [ia32] lazy context switch using TS flag [DONE] |
14 | + [ia32] MMX,SSE1-.. initialization |
19 | + [ia32] MMX,SSE1-.. initialization |
15 | + [ia32] review privilege separation [DONE] |
20 | + [ia32] review privilege separation [DONE] |
16 | + zero IOPL in EFLAGS [DONE] |
21 | + zero IOPL in EFLAGS [DONE] |
17 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
22 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
18 | + [ia32] review the cache controling bits in CR0 register |
23 | + [ia32] review the cache controling bits in CR0 register |
19 | + [ia32] zero the alignment exception bit in EFLAGS [DONE] |
24 | + [ia32] zero the alignment exception bit in EFLAGS [DONE] |
- | 25 | - Task changed to clear AM in CR0 so that |
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20 | - Task changed to clean AM in CR0 so the alignment check is disabled globally |
26 | the alignment check is disabled globally |
21 | + make emulated architectures also work on real hardware |
27 | + make emulated architectures also work on real hardware |
22 | + bring in support for other architectures (e.g. PowerPC) |
28 | + bring in support for other architectures (e.g. PowerPC) |
23 | - | ||
24 | - |