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+ implement true memory barriers for all architectures
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+ implement true memory management
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+ implement true memory management
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  + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size
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  + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size	[DONE]
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  + [mips] use some heuristics to get memory map and memory size
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  + [mips] use some heuristics to get memory map and memory size
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  + reimplement heap so that it can allocate/deallocate itself frames as necessary
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  + reimplement heap so that it can allocate/deallocate
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    itself frames as necessary
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  + provide native four-level portable page table interface
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  + provide native four-level portable page table interface		[DONE]
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    + every architecture uses its native page table format
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    + every architecture uses its native page table format
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    + kernel provides unified four-level page table interface for all architectures
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    + kernel provides unified four-level page table interface
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      for all architectures
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  + track usage of frames containing middle-level page tables (frame leak)
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  + track usage of frames containing middle-level page tables
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    (frame leak)
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+ get user mode support for all architectures
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+ get user mode support for all architectures
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+ save/restore floating point context on context switch
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+ save/restore floating point context on context switch
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  + [ia32] lazy context switch using TS flag                              [DONE]
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  + [ia32] lazy context switch using TS flag                            [DONE]
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+ [ia32] MMX,SSE1-.. initialization
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+ [ia32] MMX,SSE1-.. initialization
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+ [ia32] review privilege separation                                      [DONE]
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+ [ia32] review privilege separation                                    [DONE]
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  + zero IOPL in EFLAGS                                                   [DONE]
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  + zero IOPL in EFLAGS                                                 [DONE]
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  + before IRET (from SYSCALL), zero NT in EFLAGS                         [DONE]
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  + before IRET (from SYSCALL), zero NT in EFLAGS                       [DONE]
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+ [ia32] review the cache controling bits in CR0 register
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+ [ia32] review the cache controling bits in CR0 register
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+ [ia32] zero the alignment exception bit in EFLAGS                       [DONE]
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+ [ia32] zero the alignment exception bit in EFLAGS                     [DONE]
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  - Task changed to clear AM in CR0 so that
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  - Task changed to clean AM in CR0 so the alignment check is disabled globally
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    the alignment check is disabled globally
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+ make emulated architectures also work on real hardware
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+ make emulated architectures also work on real hardware
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+ bring in support for other architectures (e.g. PowerPC)
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+ bring in support for other architectures (e.g. PowerPC)
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