Rev 143 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 143 | Rev 144 | ||
|---|---|---|---|
| Line 14... | Line 14... | ||
| 14 | + [ia32] MMX,SSE1-.. initialization |
14 | + [ia32] MMX,SSE1-.. initialization |
| 15 | + [ia32] review privilege separation [DONE] |
15 | + [ia32] review privilege separation [DONE] |
| 16 | + zero IOPL in EFLAGS [DONE] |
16 | + zero IOPL in EFLAGS [DONE] |
| 17 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
17 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE] |
| 18 | + [ia32] review the cache controling bits in CR0 register |
18 | + [ia32] review the cache controling bits in CR0 register |
| 19 | + [ia32] zero the alignment exception bit in EFLAGS |
19 | + [ia32] zero the alignment exception bit in EFLAGS [DONE] |
| - | 20 | - Task changed to clean AM in CR0 so the alignment check is disabled globaly |
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| 20 | + make emulated architectures also work on real hardware |
21 | + make emulated architectures also work on real hardware |
| 21 | + bring in support for other architectures (e.g. PowerPC) |
22 | + bring in support for other architectures (e.g. PowerPC) |
| 22 | 23 | ||
| 23 | 24 | ||