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#
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MIPS_TARGET=mipsel-linux-gnu
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# Copyright (C) 2005 Martin Decky
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MIPS_CC_DIR=/usr/local/mipsel/bin
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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MIPS_BINUTILS_DIR=/usr/local/mipsel/bin
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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CC=$(MIPS_CC_DIR)/$(MIPS_TARGET)-gcc
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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AS=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-as
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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LD=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-ld
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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OBJDUMP=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-objdump
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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OBJCOPY=$(MIPS_BINUTILS_DIR)/$(MIPS_TARGET)-objcopy
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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BFD_ARCH=mips
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#
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## Toolchain configuration
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#
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BFD_NAME = elf32-i386
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BFD_ARCH = mips
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TARGET = mipsel-linux-gnu
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TOOLCHAIN_DIR = /usr/local/mipsel/bin
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## Make some default assumptions
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#
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ifndef CPU
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	CPU = pentium4
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endif
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## Accepted CPUs
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#
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ifeq ($(CPU),athlon-xp)
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	CFLAGS += -march=athlon-xp -mmmx -msse -m3dnow
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	DEFS += -DFENCES=486
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	CONFIG_SMP = n
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	CONFIG_HT = n
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endif
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ifeq ($(CPU),athlon-mp)
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	CFLAGS += -march=athlon-mp -mmmx -msse -m3dnow
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	DEFS += -DFENCES=486
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endif
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ifeq ($(CPU),pentium3)
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	CFLAGS += -march=pentium3 -mmmx -msse -msse2
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	DEFS += -DFENCES=486
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endif
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ifeq ($(CPU),pentium4)
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	CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 -msse3
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	DEFS += -DFENCES=p4
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endif
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## Own configuration directives
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#
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CONFIG_ACPI = y
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## Accepted configuration directives
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#
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ifeq ($(CONFIG_SMP),y)
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	DEFS += -DSMP
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endif
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ifeq ($(CONFIG_HT),y)
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	DEFS += -DHT
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endif
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ifeq ($(CONFIG_FPU_LAZY),y)
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	DEFS += -DFPU_LAZY
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endif
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ARCH_SOURCES = \
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	arch/$(ARCH)/src/context.s \
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	arch/$(ARCH)/src/debug/panic.s \
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	arch/$(ARCH)/src/delay.s \
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	arch/$(ARCH)/src/asm.S \
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	arch/$(ARCH)/src/proc/scheduler.c \
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	arch/$(ARCH)/src/bios/bios.c \
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	arch/$(ARCH)/src/smp/ap.S \
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	arch/$(ARCH)/src/smp/apic.c \
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	arch/$(ARCH)/src/smp/mps.c \
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	arch/$(ARCH)/src/smp/smp.c \
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	arch/$(ARCH)/src/atomic.S \
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	arch/$(ARCH)/src/smp/ipi.c \
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	arch/$(ARCH)/src/ia32.c \
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	arch/$(ARCH)/src/interrupt.c \
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	arch/$(ARCH)/src/pm.c \
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	arch/$(ARCH)/src/userspace.c \
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	arch/$(ARCH)/src/cpu/cpu.c \
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	arch/$(ARCH)/src/mm/frame.c \
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	arch/$(ARCH)/src/mm/memory_init.c \
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	arch/$(ARCH)/src/mm/page.c \
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	arch/$(ARCH)/src/mm/tlb.c \
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	arch/$(ARCH)/src/drivers/i8042.c \
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	arch/$(ARCH)/src/drivers/i8254.c \
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	arch/$(ARCH)/src/drivers/i8259.c \
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	arch/$(ARCH)/src/drivers/ega.c \
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	arch/$(ARCH)/src/boot/boot.S \
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	arch/$(ARCH)/src/boot/memmap.S \
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	arch/$(ARCH)/src/fpu_context.c\
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	arch/$(ARCH)/src/fmath.c
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DEFS=-DARCH=$(ARCH) -DMACHINE=${MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS}
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DEFS= -DMACHINE=${MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS}
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CFLAGS=$(DEFS) -mno-abicalls -G 0 -nostdlib -fno-builtin -O2  -fno-zero-initialized-in-bss
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CFLAGS=-mno-abicalls -G 0 -nostdlib -fno-builtin -O2  -fno-zero-initialized-in-bss
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LFLAGS=
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LFLAGS=
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BFD_ARCH=mips
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# GCC 4.0.1 compiled for mipsEL has problems compiling in
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# GCC 4.0.1 compiled for mipsEL has problems compiling in
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# BigEndian mode with the swl/swr/lwl/lwr instructions.
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# BigEndian mode with the swl/swr/lwl/lwr instructions.
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# We have to compile it with mips-sgi-irix5 to get it right.
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# We have to compile it with mips-sgi-irix5 to get it right.
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ifeq (${MACHINE},indy)
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ifeq (${MACHINE},indy)