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Line 104... Line 104...
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	mov r27 = ar.rnat
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	mov r27 = ar.rnat
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	mov r28 = ar.bspstore ;;
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	mov r28 = ar.bspstore ;;
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	/* assume kernel backing store */
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	/* assume kernel backing store */
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	mov ar.bspstore = r28 ;;
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	/* mov ar.bspstore = r28 ;; */
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	mov r29 = ar.bsp
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	mov r29 = ar.bsp
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	st8 [r31] = r27, -8 ;;	/* save ar.rnat */
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	st8 [r31] = r27, -8 ;;	/* save ar.rnat */
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	st8 [r31] = r28, -8 ;;	/* save ar.bspstore */
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	st8 [r31] = r28, -8 ;;	/* save ar.bspstore */
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	ld8 r27 = [r31], +8 ;;		/* load ar.rnat */
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	ld8 r27 = [r31], +8 ;;		/* load ar.rnat */
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	ld8 r26 = [r31], +8 ;;		/* load cr.ifs */
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	ld8 r26 = [r31], +8 ;;		/* load cr.ifs */
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	ld8 r25 = [r31], +8 ;;		/* load ar.pfs */
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	ld8 r25 = [r31], +8 ;;		/* load ar.pfs */
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	ld8 r24 = [r31], +8 ;;		/* load ar.rsc */
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	ld8 r24 = [r31], +8 ;;		/* load ar.rsc */
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	mov ar.bspstore = r28 ;;	/* (step 4) */
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	/* mov ar.bspstore = r28 ;; */	/* (step 4) */
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	mov ar.rnat = r27		/* (step 5) */
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	/* mov ar.rnat = r27 */		/* (step 5) */
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	mov ar.pfs = r25		/* (step 6) */
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	mov ar.pfs = r25		/* (step 6) */
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	mov cr.ifs = r26
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	mov cr.ifs = r26
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	mov ar.rsc = r24		/* (step 7) */
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	mov ar.rsc = r24		/* (step 7) */
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	mov loc44 = r29
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	mov loc44 = r29
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	mov loc45 = r30
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	mov loc45 = r30
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	mov loc46 = r31
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	mov loc46 = r31
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    /* 9. skipped (will not enable interrupts) */
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    /* 9. skipped (will not enable interrupts) */
- 
 
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	/*
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    	 * ssm PSR_I_MASK
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	 * ;;
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	 * srlz.d
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	 */
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    /* 10. call handler */
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    /* 10. call handler */
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    	mov b1 = loc2
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    	mov b1 = loc2
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	br.call.sptk.many b0 = b1
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	br.call.sptk.many b0 = b1
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    /* 11. return from handler */
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    /* 11. return from handler */
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0:
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0:
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    /* 12. skipped (will not disable interrupts) */
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    /* 12. skipped (will not disable interrupts) */
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	/*
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    	 * rsm PSR_I_MASK
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	 * ;;
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	 * srlz.d
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	 */
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    /* 13. restore general and floating-point registers */
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    /* 13. restore general and floating-point registers */
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	/* TODO: restore floating-point context */
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	/* TODO: restore floating-point context */
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	mov r1 = loc17
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	mov r1 = loc17
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	mov r2 = loc18
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	mov r2 = loc18